SPC56ECxx datasheet(59/123 Pages) STMICROELECTRONICS

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SPC564Bxx-SPC56ECxx

Electrical Characteristics

122

Medium and fast pads can use slow configuration to reduce electromagnetic emission, at

the cost of reducing AC performance.

3.6.2

I/O input DC characteristics

Table 14 provides input DC electrical characteristics as described in Figure 5.

Figure 5. I/O input DC electrical characteristics definition

VIL

VIN

VIH

PDIx = ‘1

VDD

VHYS

(GPDI register of SIUL)

PDIx = ‘0’

Table 14. I/O input DC electrical characteristics

Symbol

Parameter

Conditions(1)

Value(2)

Unit

Min

Typ

Max

VIH

SR P

Input high level CMOS (Schmitt

Trigger)

—0.65 VDD

—VDD + 0.4

VIL

SR P

Input low level CMOS (Schmitt

Trigger)

—

0.3

—

0.35VDD

VHYS CC C

Input hysteresis CMOS (Schmitt

Trigger)

—0.1VDD

——

ILKG CC

Digital input leakage

No injection

on adjacent

TA = 40 °C

—

PTA = 25 °C

—

DTA = 105 °C

—

500

PTA = 125 °C

—

1000

WFI

SR P

Width of input pulse rejected by

analog filter(3)

——

—

40(4)

WNFI SR P

Width of input pulse accepted by

analog filter(3)

—1000(4)

——

VDD = 3.3 V ± 10 % / 5.0 V ± 10 %, TA = 40 to 125 °C, unless otherwise specified.

VDD as mentioned in the table is VDD_HV_A/VDD_HV_B. All values need to be confirmed during device validation.

Analog filters are available on all wakeup lines.

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