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TMS320DM6431 Datasheet(PDF) 105 Page - Texas Instruments |
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TMS320DM6431 Datasheet(HTML) 105 Page - Texas Instruments |
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105 / 227 page ![]() TMS320DM6431 Digital Media Processor www.ti.com SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008 Table 3-41. EMIFA/VPSS Sub-Block 0 Configuration Choice E(1) MAJOR MINOR PINMUX SELECTION FIELDS RESULTING PERIPHERALS/PINS CONFIG CONFIG AEM AEAW OTHERS EMIFA VPFE # GPIO PINS OPTION OPTION 8-bit EMIFA Cfg Summary (NAND) Pinout No CCDC 21 GP pins mode 5 Basic Pins You Get - - GP[51:46] CCDCSEL = 0 0 = GP[54, 43:36] E1 101 000 HVDSEL = 0 0 = GP[53:52] CWENSEL = 0 - - 0 = GP[35] CFLDSEL = 0 0 = GP[34] CI10SEL = 0 0 = GP[45:44] E 8-bit EMIFA Cfg Summary (NAND) Pinout 8-to-10-bit CCDC 6-to-12 GP pins mode 5 Basic Pins You Get - - GP[51:46] CCDCSEL = 1 1 = PCLK, YI[7:0] - E2 101 000 HVDSEL = 0,1 1= VD, HD 0 = GP[53:52] CWENSEL = 0,1 - 1 = C_WE 0 = GP[35] CFLDSEL = 0,1 1 = C_FIELD 0 = GP[34] CI10SEL = 0,1 1 = CI[1:0] 0 = GP[45:44] (1) Italics indicate mandatory settings for a given Minor Configuration option. As shown in Table 3-39 through Table 3-41, the configuration choices of the EMIFA/VPSS Sub-Block 0 are determined by the following PINMUX register fields: • PINMUX0 register fields AEM, AEAW, CCDCSEL, HVDSEL, CWENSEL, CFLDSEL, and CI10SEL. The following is an example of how to read Table 3-39 through Table 3-41 using Sub-Block 0 Minor Configuration B6 as an example: • The PINMUX Selection Fields columns indicate that Sub-Block 0 Minor Configuration Option B6 is selected through setting, PINMUX0.AEM = 1, PINMUX0.AEAW = 4, CCDCSEL = 1, HVDSEL = 0 or 1 (based on the system’s need for VPFE control signals VD and HD), CWENSEL = 0 (mandatory setting), CFLDSEL = 0 or 1 (based on the system’s need for VPFE control signal C_FIELD), and CI10SEL = 0 (mandatory). • The Resulting Peripherals/Pins columns show the functional pins resulting from the PINMUX setting. For example, PINMUX0.CCDCSEL = 1 gives the user the PCLK and YI[7:0] pins for the VPFE. PINMUX0.HVDSEL = 1 gives the user VD and HD pins for VPFE, while HVDSEL = 0 gives the user 2 GP pins. Submit Documentation Feedback Device Configurations 105 |
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