TMS320DM6431 datasheet(109/227 Pages) TI1

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TMS320DM6431

Digital Media Processor

www.ti.com

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

Table 3-46. EMIFA/VPSS Sub-Block 0 Pin-By-Pin Mux Control

MULTIPLEXED FUNCTIONS

SIGNAL NAME

VPFE

EMIFA ADDR/CTRL

GPIO

FUNCTION

SELECT

FUNCTION

SELECT

FUNCTION

SELECT

PCLK/GP[54]

PCLK

CCDCSEL = 1

–

GP[54]

CCDCSEL = 0

YI7(CCD7)/GP[43]

YI7(CCD7)

–

GP[43]

YI6(CCD6)/GP[42]

YI6(CCD6)

–

GP[42]

YI5(CCD5)/GP[41]

YI5(CCD5)

–

GP[41]

YI4(CCD4)/GP[40]

YI4(CCD4)

–

GP[40]

YI3(CCD3)/GP[39]

YI3(CCD3)

–

GP[39]

YI2(CCD2)/GP[38]

YI2(CCD2)

–

GP[38]

YI1(CCD1)/GP[37]

YI1(CCD1)

–

GP[37]

YI0(CCD0)/GP[36]

YI0(CCD0)

–

GP[36]

VD/GP[53]

HVDSEL = 1

–

GP[53]

HVDSEL = 0

HD/GP[52]

–

GP[52]

EM_A[13]/GP[51]

–

EM_A[13]

AEM = 1,

GP[51]

AEM = 0/1/5,

AEAW = 1/2/3/4

AEAW = 0

EM_A[14]/GP[50]

–

EM_A[14]

GP[50]

EM_A[15]/GP[49]

–

EM_A[15]

AEM = 1,

GP[49]

AEM = 0/1/5,

AEAW = 2/3/4

AEAW = 0/1(1)

EM_A[16]/GP[48]

–

EM_A[16]

GP[48]

EM_A[17]/GP[47]

–

EM_A[17]

AEM = 1,

GP[47]

AEM = 0/1/5,

AEAW = 3/4

AEAW = 0/1/2(1)

EM_A[18]/GP[46]

–

EM_A[18]

GP[46]

CI1(CCD9)/EM_A[19]/GP[45]

CI1(CCD9)

AEM = 0/1/5,

EM_A[19]

AEM = 1,

GP[45]

AEM = 0/1/5,

AEAW = 0/1/2/3(1),

AEAW = 4,

AEAW = 0/1/2/3(1),

CI0(CCD8)/EM_A[20]/GP[44]

CI0(CCD8)

EM_A[20]

GP[44]

CI10SEL = 1

CI10SEL = 0

C_WE/EM_R/W/GP[35]

CWENSEL = 1,

CWENSEL = 0,

C_WE

EM_R/W

GP[35]

AEM = 0/5

AEM = 1

AEM = 0/5

C_FIELD/EM_A[21]/GP[34]

CFLDSEL = 1,

CFLDSEL = 0,

C_FIELD

EM_A[21]

GP[34]

AEM = 0/1/5

AEM = 1

AEM = 0/5

(1)

AEAW = 1/2/3/4 is only valid if AEM[2:0] = 1.

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Device Configurations

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TMS320DM6431 Datasheet(PDF) 109 Page - Texas Instruments

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