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CS5530A Datasheet(PDF) 119 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5530A
Description  Geode CS5530A I/O Companion Multi-Function South Bridge
PDF  259 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5530A Datasheet(HTML) 119 Page - National Semiconductor (TI)

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Functional Description (Continued)
3.7.1.2
Physical Region Descriptor Table Address
Before the bus master starts a master transfer it must be
programmed with a pointer (PRD Table Address Register)
to a Physical Region Descriptor Table. This pointer sets the
starting memory location of the Physical Region Descrip-
tors (PRDs). The PRDs describe the areas of memory that
are used in the data transfer. The descriptor table entries
must be aligned on a 4-byte boundary and the table cannot
cross a 64 KB boundary in memory.
3.7.1.3
Physical Region Descriptor Format
Each physical memory region to be transferred is
described by a Physical Region Descriptor (PRD) as illus-
trated in Table 3-65. When the bus master is enabled
(Command Register bit 0 = 1), data transfer proceeds until
each PRD in the PRD table has been transferred. The bus
master does not cache PRDs.
ThePRD table consists oftwo DWORDs.The firstDWORD
contains a 32-bit pointer to a buffer to be transferred. The
second DWORD contains the size (16 bits) of the buffer
and flags (EOT, EOP, JMP). The description of the flags are
as follows:
• EOT bit - If set in a PRD, this bit indicates the last entry
in the PRD table (bit 31). The last entry in a PRD table
must have either the EOT bit or the JMP bit set. A PRD
can not have both the JMP and EOT bits set.
• EOP bit - If set in a PRD and the bus master has
completed the PRD’s transfer, the End of Page bit is set
(Status Register bit 0 = 1) and an SMI is generated. If a
second EOP is reached due to the completion of
another PRD before the End of Page bit is cleared, the
Bus Master Error bit is set (Status Register bit 1 = 1) and
the bus master pauses. In this paused condition, reading
the Status Register clears both the Bus Master Error
and the End of Page bits and the bus master continues.
• JMP bit - This PRD is special. If set, the Memory Region
Physical Base Address is now the target address of the
JMP. There is no data transfer with this PRD. This PRD
allows the creation of a looping mechanism. If a PRD
table is created with the JMP bit set in the last PRD, the
PRD table does not need a PRD with the EOT bit set. A
PRD can not have both the JMP and EOT bits set.
Table 3-65. Physical Region Descriptor Format
DWORD
Byte 3
Byte 2
Byte 1
Byte 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
876543
210
0
Memory Region Base Address [31:1] (Audio Data Buffer)
0
1E
O
T
E
O
P
J
M
P
Reserved
Size [15:1]
0



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