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CS5530A Datasheet(PDF) 129 Page - National Semiconductor (TI) |
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CS5530A Datasheet(HTML) 129 Page - National Semiconductor (TI) |
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129 / 259 page ![]() Revision 1.1 129 www.national.com Functional Description (Continued) 3.7.2.3 IRQ Configuration Registers The CS5530A provides the ability to set and clear IRQs internally through software control. If the IRQs are config- ured for software control, they will not respond to external hardware. There are three registers provided for this fea- ture: • Internal IRQ Enable Register • Internal IRQ Mask Register • Internal IRQ Control Register Internal IRQ Enable Register This register configures the IRQs as internal (software) interrupts or external (hardware) interrupts. Any IRQ used as an internal software driven source must be configured as internal. Internal IRQ Mask Register Each bit in the Mask register individually disables the cor- responding bit in the Control Register. Internal IRQ Control Register This register allows individual software assertion/deasser- tion of the IRQs that are enabled as internal and unmasked. Thebit formats for theseregisters aregiven in Table3-70. Table 3-70. IRQ Configuration Registers Bit Description F3BAR+Memory Offset 1Ah-1Bh Internal IRQ Enable Register (R/W) Reset Value = 0000h 15 IRQ15 Internal: Configure IRQ15 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 14 IRQ14 Internal: Configure IRQ14 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 13 Reserved: Set to 0. 12 IRQ12 Internal: Configure IRQ12 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 11 IRQ11 Internal: Configure IRQ11 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 10 IRQ10 Internal: Configure IRQ10 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 9 IRQ9 Internal: Configure IRQ9 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 8 Reserved: Set to 0. 7 IRQ7 Internal: Configure IRQ7 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 6 Reserved: Set to 0. 5 IRQ5 Internal: Configure IRQ5 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 4 IRQ4 Internal: Configure IRQ4 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 3 IRQ3 Internal: Configure IRQ3 for internal (software) or external (hardware) use. 0 = External; 1 = Internal. 2:0 Reserved: Set to 0. Note: Must be read and written as a WORD. F3BAR+Memory Offset 1Ch-1Dh Internal IRQ Control Register (R/W) Reset Value = 0000h 15 Assert Masked Internal IRQ15: 0 = Disable; 1 = Enable. 14 Assert Masked Internal IRQ14: 0 = Disable; 1 = Enable. 13 Reserved: Set to 0. 12 Assert Masked Internal IRQ12: 0 = Disable; 1 = Enable. 11 Assert masked internal IRQ11: 0 = Disable; 1 = Enable. 10 Assert Masked Internal IRQ10: 0 = Disable; 1 = Enable. 9 Assert Masked Internal IRQ9: 0 = Disable; 1 = Enable. 8 Reserved: Set to 0. 7 Assert Masked Internal IRQ7: 0 = Disable; 1 = Enable. 6 Reserved: Set to 0. 5 Assert Masked Internal IRQ5: 0 = Disable; 1 = Enable. 4 Assert Masked Internal IRQ4: 0 = Disable; 1 = Enable. |
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