MMPF0200 datasheet(17/114 Pages) NXP

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NXP Semiconductors

PF0200

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Functional block requirements and behaviors

6.1

Start-up

The PF0200 can be configured to start-up from either the internal OTP configuration, or with a hard-coded configuration built into the

device. The internal hard-coded configuration is enabled by connecting the VDDOTP pin to VCOREDIG through a 100 kohm resistor. The

OTP configuration is enabled by connecting VDDOTP to GND.

For NP devices, selecting the OTP configuration causes the PF0200 to not start-up. However, the PF0200 can be controlled through the

I2C port for prototyping and programming. Once programmed, the NP device will startup with the customer programmed configuration.

6.1.1

Device start-up configuration

Table 8 shows the Default Configuration which can be accessed on all devices as described above, as well as the pre-programmed OTP

configurations.

Table 8. Start-up configuration

Registers

Default configuration

Pre-programmed OTP configuration

All devices

Default I2C Address

0x08

VSNVS_VOLT

3.0 V

SW1AB_VOLT

1.375 V

SW1AB_SEQ

SW2_VOLT

3.0 V

3.3 V

3.15 V

3.3 V

SW2_SEQ

SW3A_VOLT

1.5 V

1.2 V

1.5 V

1.35 V

SW3A_SEQ

SW3B_VOLT

1.5 V

1.2 V

1.5 V

1.35 V

SW3B_SEQ

SWBST_VOLT

5.0 V

SWBST_SEQ

VREFDDR_SEQ

VGEN1_VOLT

1.5 V

1.2 V

VGEN1_SEQ

VGEN2_VOLT

1.5 V

VGEN2_SEQ

VGEN3_VOLT

2.5 V

1.8 V

2.8 V

VGEN3_SEQ

VGEN4_VOLT

1.8 V

VGEN4_SEQ

VGEN5_VOLT

2.5 V

2.8 V

2.5 V

3.3 V

VGEN5_SEQ

VGEN6_VOLT

2.8 V

3.3 V

3.0 V

VGEN6_SEQ

MMPF0200 Datasheet(PDF) 17 Page - NXP Semiconductors

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