| Electronic Components Datasheet Search |
|
MMPF0200 Datasheet(PDF) 12 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
MMPF0200 Datasheet(HTML) 12 Page - NXP Semiconductors |
|
12 / 114 page ![]() 12 NXP Semiconductors PF0200 GENERAL PRODUCT CHARACTERISTICS 4.3.2 Current consumption Table 7. Current consumption summary Consumer TA = -40 to 85 °C and Extended Industrial TA = -40 to 105 °C, VIN = 3.6 V, VDDIO = 1.7 to 3.6 V, LICELL = 1.8 to 3.3 V, VSNVS = 3.0 V, typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VDDIO = 3.3 V, LICELL = 3.0 V, VSNVS = 3.0 V and 25 °C, unless otherwise noted. Mode PF0200 conditions System Conditions Typ. Max. Unit Coin Cell (15),(16),(19) VSNVS from LICELL All other blocks off VIN = 0.0 V VSNVSVOLT[2:0] = 110 No load on VSNVS 4.0 7.0 μA Off (15)(17) VSNVS from VIN or LICELL Wake-up from PWRON active 32 k RC on All other blocks off VIN ≥ UVDET No load on VSNVS, PMIC able to wake-up 17 25 μA Sleep (18) VSNVS from VIN Wake-up from PWRON active Trimmed reference active SW3A/B PFM Trimmed 16 MHz RC off 32 k RC on VREFDDR disabled No load on VSNVS. DDR memories in self refresh 122 122 220(20) 250(21) μA Standby (18) VSNVS from either VIN or LICELL SW1A/B combined in PFM SW2 in PFM SW3A/B combined in PFM SWBST off Trimmed 16 MHz RC enabled Trimmed reference active VGEN1-6 enabled VREFDDR enabled No load on VSNVS. Processor enabled in low power mode. All rails powered on except boost (load = 0 mA) 270 270 430(20) 525(21) μA Notes 15. At 25 °C only. 16. Refer to Figure 4 for Coin Cell mode characteristics over temperature. 17. When VIN is below the UVDET threshold, in the range of 1.8 V ≤ VIN < 2.65 V, the quiescent current increases by 50 μA, typically. 18. For PFM operation, headroom should be 300 mV or greater. 19. Additional current may be drawn in the coin cell mode when RESETBMCU is pulled up to VSNVS due an internal path from RESETBMCU to VIN. The additional current is <30 μA with a pull up resistor of 100 kΩ. The i.MX 6 processors have an internal pull-up from the POR_B pin to the VDD_SNVS_IN pin. If additional current in the coin cell mode is not desired for i.MX6 applications, use an external switch to disconnect the RESETBMCU path when VIN is removed. Pull-up RESETBMCU to a rail that is off in the coin cell mode, for non-i.MX 6 applications. 20. From -40 to 85 °C, Applicable to Consumer and Extended Industrial part numbers 21. From -40 to 105 °C, Applicable only to Extended Industrial parts |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |