AD9154 datasheet(64/124 Pages) AD

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AD9154

Data Sheet

Rev. C | Page 64 of 124

The NCO phase offset is set as shown in Table 66 and paged as

described in the Dual Paging section. Because this function is

part of the fine modulation block, phase offset is not updated

immediately upon writing. Instead, it updates on the rising edge of

FTW_ UPDATE_REQ (Register 0x113, Bit 0 ) along with the FTW.

Table 66. NCO Phase Offset Registers

Address

Value

0x11A

NCO_PHASE_OFFSET[7:0]

0x11B

NCO_PHASE_OFFSET[15:8]

INVERSE SINC

DACs have a sin(x)/x amplitude roll-off as a function frequency.

This characteristic is shown in blue in Figure 72. The AD9154

provides a digital inverse sinc function to compensate for this

roll-off over frequency. The filter is enabled by setting the

INVSINC_ENABLE bit (Register 0x111, Bit 7, paged as described

in the Dual Paging section). Inverse sinc is enabled by default.

Figure 72 shows the frequency response of sin(x)/x roll-off, the

inverse sinc filter, and the composite response. The composite

response has less than ±0.05 dB pass-band ripple up to a

frequency of 0.4 × fDACCLK. To provide the necessary peaking at

the upper end of the pass band, the inverse sinc filter shown has

an intrinsic insertion loss of about 3.8 dB; in many cases, this can

be partially compensated as described in the Digital Gain section.

–1

–2

–3

–4

–5

0.05

0.10

0.15

0.20

FREQUENCY (×

fDAC)

0.25

0.30

0.35

0.45

0.40

0.50

SIN(X)/X ROLL-OFF

SINC–1 FILTER RESPONSE

COMPOSITE RESPONSE

Figure 72. Responses of sin(x)/x Roll-Off, the Sinc−1 Filter, and the Composite

of the Two Input Signal Power Detection and Protection

DIGITAL GAIN, PHASE ADJUST, DC OFFSET, AND

GROUP DELAY

Digital gain, phase adjust, and dc offset (as described in the

Digital Gain section, Phase Adjust section, and DC Offset

section) allow compensation of imbalances in the I and Q paths

due to analog mismatches between DAC I/Q outputs, quadrature

modulator I/Q baseband inputs, and DAC/modulator interface

I/Q paths. These imbalances can cause the two following issues:



An unwanted sideband signal appears at the quadrature

modulator output with significant energy. Cancel this

signal using digital gain and phase adjust.

Tuning the quadrature gain and phase adjust values can

optimize complex image rejection in single sideband radios

or can optimize the error vector magnitude (EVM) in zero

IF (ZIF) architectures.



The LO leakage at the output of a quadrature modulator

following the AD9154 in a signal chain can be cancelled by

adjusting the dc current output of each DAC driving

modulator signal inputs.

Digital Gain

Digital gain independently adjusts the digital signal magnitude

being fed into each DAC. The digital gain code can be left at its

default value where it provides 0 dB of digital backoff (in other

words, a gain of 1), or it can be programmed to provide larger

digital backoff. Digital gain can be programmed to introduce an

I/Q pair gain imbalance to help a quadrature modulator following

the AD9154 in a signal chain cancel an unwanted SSB sideband.

Digital gain is enabled by default and must not be disabled.

The amount of digital gain (GainCode) desired can be program-

med in the registers shown in Table 67. The digital gain settings

are described in the following equations:

0 ≤ Gain ≤ 4095/2048

−∞ dB ≤ dBGain ≤ 6.018 dB

Gain = GainCode × (1/2048)

dBGain = 20 × log10(Gain)

GainCode = 2048 × Gain = 2048 × 10dBGain/20

where GainCode is a 12-bit unsigned binary number.

The I/Q digital gain is set as shown in Table 67 and paged as

described in the Dual Paging section.

Table 67. Digital Gain Registers

Addr.

Value

Description

0x111[5]

DIG_GAIN_ENABLE

Set to 1 to enable digital gain

at reset

0x13C

GAINCODEI[7:0]

I DAC LSB gain code

0x13D

GAINCODEI[11:8]

I DAC MSB gain code

0x13E

GAINCODEQ[7:0]

Q DAC LSB gain code

0x13F

GAINCODEQ[11:8]

Q DAC MSB gain code

Phase Adjust

Ordinarily, the I and Q channels of each DAC pair have an

angle of 90° between them. The phase adjust feature changes the

angle between the I and Q channels, which balances the phase

into a modulator.

−14 ≤ DegreesAdjust < 14

PhaseAdj = (DegreesAdjust/14) × 212

where PhaseAdj is a 13-bit twos complement number.

The phase adjust is set as shown in Table 68 and paged as

described in the Dual Paging section.

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