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DSP56857 Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc |
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31 / 662 page  Preface, Rev. 4 Freescale Semiconductor xxix • For clarity, all signals are referenced with capital letters throughout this document • Descriptive functionality of signals is taken into account when choosing signal names. This may imply names for system bus interface signals that are different than those defined in the 56800E specification documents. • All efforts are made to maintain compliance with Semiconductor Reuse Standards guidelines • The prefix IPBB_ is used for all signals initiated from the IP Bus bridge • A prefix symbolizing a specific block’s name is used to distinguish input signals (point to point signals) • All signals initiated from a particular bus will contain a prefix signifying that bus Throughout the manual, registers displaying a grayed area designate reserved bits. Table 0-1. Pin Conventions Signal/Symbol Logic State Signal State Voltage1 1.Values for VIL, VOL, VIH, and VOH are defined by individual product specifications. The following standards are recognized in choosing block I/O signal names for the bridge: PIN True Asserted VIL/VOL PIN False Deasserted VIH/VOH PIN True Asserted VIH/VOH PIN False Deasserted VIL/VOL = Reserved or not implemented bit, written as zero for future compatibility |
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