DSP56857 datasheet(59/662 Pages) FREESCALE

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56857 Peripheral Blocks

5685X Overview, Rev. 4

Freescale Semiconductor

1-27

•

External Memory Interface (EMI)

•

JTAG/Enhanced On-Chip Emulation (EOnCE) for unobtrusive, real-time debugging

1.9 56855 Peripheral Blocks

The 56855 provides these peripheral blocks:

•

Two Serial Communication Interfaces (SCI0 and SCI2), each with two pins, or four

additional GPIO lines

•

Enhanced Synchronous Serial Interface (ESSI0), with six pins or additional GPIO lines

•

General Purpose 16-bit Quad Timer with one pin or additional GPIO line

•

Interrupt Controller

•

Computer Operating Properly (COP)/Watchdog Timer

•

Time of Day (TOD)

•

Clock Generator

•

System Integration Module (SIM)

•

External Memory Interface (EMI)

•

JTAG/Enhanced On-Chip Emulation (EOnCE) for unobtrusive, real-time debugging

1.10 56857 Peripheral Blocks

The 56857 provides these peripheral blocks:

•

Two Serial Communication Interfaces (SCI), each with two pins, or four additional GPIO

lines

•

Two Enhanced Synchronous Serial Interfaces (ESSI0 and ESSI1), each with six pins, or

12 additional GPIO lines

•

General Purpose 16-bit Quad Timer (TMR) with four pins or additional GPIO lines

•

Serial Port Interface (SPI) with four pins or additional GPIO lines

•

Eight-bit Parallel Host Interface (HI8) with 16 pins, or 16 additional GPIO lines

•

Interrupt Controller

•

Computer Operating Properly (COP)/Watchdog Timer

•

Time of Day (TOD)

•

Clock Generator

•

System Integration Module (SIM)

•

External Memory Interface (EMI)

•

JTAG/Enhanced On-Chip Emulation (EOnCE) for unobtrusive, real-time debugging

DSP56857 Datasheet(PDF) 59 Page - Freescale Semiconductor, Inc

DSP56857 Datasheet(HTML) 59 Page - Freescale Semiconductor, Inc

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