DSP56857 datasheet(349/662 Pages) FREESCALE

349 / 662 page

Enhanced Synchronous Serial Interface (ESSI), Rev. 4

Freescale Semiconductor

12-49

12.8.10.9 Serial Control Direction 1 (SCD1)—Bit 3

This bit controls the direction of the SC1 pin depending on the state of other controls as shown in

Table 12-15.

•

0 = SC1 is an input

•

1 = SC1 is an output

12.8.10.10 Serial Control Direction 0 (SCD0)—Bit 2

This bit controls the direction of the SC0 pin depending on the state of other controls as shown in

Table 12-16.

•

0 = SC0 is an input

•

1 = SC0 is an output

12.8.10.11 Serial Output Flag 1 (OF1)—Bit 1

When SC1 is configured for Output Flag functionality, data provided in Table 12-15, this control

bit determines the state of the output pin. Changes in the OF1 bit will appear on the SC1 pin at the

beginning of the next frame in the Normal mode, or at the beginning of the next time slot in the

Network mode.

Table 12-15.

Control Modes Where SCD1 is Used

SYN

TE2

Functional State

SCD1 control direction of SC1

SC1 is used as flag 1 where SCD1 determines whether it is an output flag or an output flag

SC1 is an output

Table 12-16.

Control Modes Where SCD0 is Used

SYN

TE2

Functional State

SCD0 control direction of SCI0

SC0 is used as flag 0 where SCD0 determines whether it is an output flag or an output flag

SC0 is an output

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