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DSP56857 Datasheet(PDF) 131 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 131 Page - Freescale Semiconductor, Inc |
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131 / 662 page  Block Diagram External Memory Interface (EMI), Rev. 4 Freescale Semiconductor 5-5 5.4 Block Diagram A simplified block diagram illustrating the connections to the EMI is illustrated in Figure 5-1. The left side of the figure shows connections to the 56800E core buses and clocks. All available external EMI signals are shown on the right side of the figure. In some cases, pin count restrictions may limit the number of EMI signals brought out of the package. Figure 5-1. EMI Block Diagram XAB1[23:0] CBW[31:0] CDBR_M[31:0] PRIMARY DATA ACCESS SECONDARY DATA READ XAB2[23:0] XDB2_M[15:0] PROGRAM MEMORY ACCESS PAB[20:0] CDBW[15:0] PDB_M[31:0] XAB1[23:0] CDBW[31:0] CDBR_M[31:0] XAB2[23:0] XDB2_m[15:0] PAB[20:0] PDB_M[31:0] C7WAITST HOLDOFF CLK A[23:0] D[16:0] CS[7:0] RD WR FLASH_SECURITY_EN OPTIONAL EMI 56800E CORE CLOCK GEN. |
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