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DSP56857 Datasheet(PDF) 185 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 185 Page - Freescale Semiconductor, Inc |
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185 / 662 page  Functional Description Overview, Rev. 4 Freescale Semiconductor 8-7 8.5 Block Diagram The ITCN module block diagram is illustrated Figure 8-2. Figure 8-2. Interrupt Controller Block Diagram 8.6 Functional Description The Interrupt Controller is a slave on the IPBus. It contains registers each allowing the 70 interrupt sources to be set to one of four priority levels (excluding certain interrupts of fixed priority). Next, all of the interrupt requests of a given level are priority encoded to determine the lowest numerical value of the active interrupt requests for that level. Within a given priority level, zero is the highest priority and number 69 is the lowest. 2 >4 Decode INT1 INT70 Level 0 Any 0 Level Any 3 Level INT VAB IPIC Control 7 7 PIC_EN IACK SR[9:8] Priority Level 2 >4 Decode 70 >7 Priority Encoder Level 3 Priority Level 70 >7 Priority Encoder |
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