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HD64F2145 Datasheet(PDF) 71 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 71 Page - Renesas Technology Corp |
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71 / 829 page  Rev. 2.0, 08/02, page 31 of 788 H'0000 H'0001 H'0002 H'0003 H'0004 H'0005 H'0006 H'0007 H'0008 H'0009 H'000A H'000B Reset exception vector (Reserved for system use) Exception vector 1 Exception vector 2 Exception vector table (Reserved for system use) Figure 2.1 Exception Vector Table (Normal Mode) (a) Subroutine Branch (b) Exception Handling PC (16 bits) CCR CCR* PC (16 bits) SP Note: * Ignored when returning. SP Figure 2.2 Stack Structure in Normal Mode 2.2.2 Advanced Mode • Address space Linear access to a maximum address space of 16 Mbytes is possible. • Extended registers (En) The extended registers (E0 to E7) can be used as 16-bit registers. They can also be used as the upper 16-bit segments of 32-bit registers or address registers. • Instruction set All instructions and addressing modes can be used. |
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