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HD64F2145 Datasheet(PDF) 78 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 78 Page - Renesas Technology Corp |
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78 / 829 page ![]() Rev. 2.0, 08/02, page 38 of 788 2.4.5 Initial Register Values The program counter (PC) among CPU internal registers is initialized when reset exception handling loads a start address from a vector table. The trace (T) bit in EXR is cleared to 0, and the interrupt mask (I) bits in CCR and EXR are set to 1. The other CCR bits and the general registers are not initialized. Note that the stack pointer (ER7) is undefined. The stack pointer should therefore be initialized by an MOV.L instruction executed immediately after a reset. 2.5 Data Formats The H8S/2000 CPU can process 1-bit, 4-bit BCD, 8-bit (byte), 16-bit (word), and 32-bit (longword) data. Bit-manipulation instructions operate on 1-bit data by accessing bit n (n = 0, 1, 2, …, 7) of byte operand data. The DAA and DAS decimal-adjust instructions treat byte data as two digits of 4-bit BCD data. 2.5.1 General Register Data Formats Figure 2.9 shows the data formats of general registers. 70 70 MSB LSB MSB LSB 70 43 Don't care Don't care Don't care 70 43 70 Don't care 65 43 2 71 0 70 Don't care 65 43 2 71 0 Don't care RnH RnL RnH RnL RnH RnL Data Type Register Number Data Image Byte data Byte data 4-bit BCD data 4-bit BCD data 1-bit data 1-bit data Upper Lower Upper Lower Figure 2.9 General Register Data Formats (1) |
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