HD64F2145 datasheet(94/829 Pages) RENESAS

94 / 829 page

Rev. 2.0, 08/02, page 54 of 788

A 24-bit absolute address (@aa:24) indicates the address of a program instruction. The upper 8

bits are all assumed to be 0 (H'00).

Table 2.12

Absolute Address Access Ranges

Absolute Address

Normal Mode

Advanced Mode

8 bits (@aa:8)

H'FF00 to H'FFFF

H'FFFF00 to H'FFFFFF

16 bits (@aa:16)

H'000000 to H'007FFF,

H'FF8000 to H'FFFFFF

Data address

32 bits (@aa:32)

Program instruction

address

24 bits (@aa:24)

H'0000 to H'FFFF

H'000000 to H'FFFFFF

2.7.6

Immediate—#xx:8, #xx:16, or #xx:32

The 8-bit (#xx:8), 16-bit (#xx:16), or 32-bit (#xx:32) immediate data contained in an instruction

code can be used directly as an operand.

The ADDS, SUBS, INC, and DEC instructions implicitly contain immediate data in their

instruction codes. Some bit manipulation instructions contain 3-bit immediate data in the

instruction code, specifying a bit number. The TRAPA instruction contains 2-bit immediate data

in its instruction code, specifying a vector address.

2.7.7

Program-Counter Relative—@(d:8, PC) or @(d:16, PC)

This mode can be used by the Bcc and BSR instructions. An 8-bit or 16-bit displacement

contained in the instruction code is sign-extended to 24 bits and added to the 24-bit address

indicated by the PC value to generate a 24-bit branch address. Only the lower 24 bits of this

branch address are valid; the upper 8 bits are all assumed to be 0 (H'00). The PC value to which

the displacement is added is the address of the first byte of the next instruction, so the possible

branching range is –126 to +128 bytes (–63 to +64 words) or –32766 to +32768 bytes (–16383 to

+16384 words) from the branch instruction. The resulting value should be an even number.

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