ATTINY817-MFR. datasheet(55/492 Pages) MICROCHIP

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Name:

INTCTRL

Offset: 0x03

Reset:

0x00

Property:

Bit

EEREADY

Access

R/W

Reset

Bit 0 – EEREADY: EEPROM Ready Interrupt

Writing a '1' to this bit enables the interrupt which indicates that the EEPROM is ready for new write/erase

operations.

This is a level interrupt that will be triggered only when the EEREADY flag in the INTFLAGS register is set

to zero. Thus, the interrupt should not be enabled before triggering an NVM command, as the EEREADY

flag will not be set before the NVM command issued. The interrupt should be disabled in the interrupt

handler.

9.5.5

Interrupt Flags

Name:

INTFLAGS

Offset: 0x04

Reset:

0x00

Property:

Bit

EEREADY

Access

R/W

Reset

Bit 0 – EEREADY: EEREADY Interrupt Flag

Interrupt flag for the EEPROM interrupt. This bit is cleared by writing a '1' to it. When this interrupt is

enabled, it will immediately request an interrupt, and it will continue to request interrupts continuously -

even if no EEPROM writes are initiated.

9.5.6

Data

The NVMCTRL.DATAL and NVMCTRL.DATAH register pair represents the 16-bit value,

NVMCTRL.DATA. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8]

(suffix H) can be accessed at offset + 0x01. For more details on reading and writing 16-bit registers, refer

to Accessing 16-bit Registers.

Name:

DATA

Offset: 0x06

Reset:

0x00

Property:

ATtiny417/817

Datasheet Complete

DS40001901B-page 55

ATTINY817-MFR. Datasheet(PDF) 55 Page - Microchip Technology

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