ATTINY817-MFR. datasheet(59/492 Pages) MICROCHIP

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–

CLK_BOD is used by the BOD. It will be requested when the BOD is enabled in Sampled

Mode.

–

CLK_TCD is used by the TCD. It will be requested when the TCD is enabled. The clock

source can only be changed if the peripheral is disabled.

The clock source for the for the Main Clock domain is configured by writing to the Clock Select bits

(CLKSEL) in the Main Clock Control A register (CLKCTRL.MCLKCTRLA). The asynchronous clock

sources are configured by registers in the respective peripheral.

10.2.2

Signal Description

Signal

Type

Description

CLKOUT

Digital output

CLK_PER output

Related Links

I/O Multiplexing and Considerations

10.3

Functional Description

10.3.1

Sleep Mode Operation

When a clock source is not used/requested it will turn off. It is possible to request an clock source directly

by writing a '1' to the Run Standby bit (RUNSTDBY) in the respective oscillator's Control A register

(CLKCTRL.[osc]CTRLA). This will cause the oscillator to run constantly, except for Power Down sleep

mode. Additionally, when this bit is written to '1' the oscillator start-up time is eliminated when the clock

source is requested by a peripheral.

The Main Clock will always run in Active and Idle sleep mode. In Standby sleep mode, the Main Clock will

only run if any peripheral is requesting it, or the Run in Standby bit (RUNSTDBY) in the respective

oscillator's Control A register (CLKCTRL.[osc]CTRLA) is written to '1'.

In Power Down sleep mode, the Main Clock will stop after all NVM operations are completed.

10.3.2

Main Clock Selection and Prescaler

All internal oscillators can be used as the Main Clock source for CLK_MAIN. The Main Clock source is

selectable from software, and can be safely changed during normal operation.

Built-in hardware protection prevents unsafe clock switching:

Upon selection of an external clock source, a switch to the chosen clock source will only occur if edges

are detected, indicating it is stable. Until a sufficient number of clock edges are detected, the switch will

not occur and it will not be possible to change to another clock source again without executing a Reset.

An ongoing clock source switch is indicated by the System Oscillator Changing flag (SOSC) in the Main

Clock Status register (CLKCTRL.MCLKSTATUS). The stability of the external clock sources is indicated

by the respective status flags (EXTS and XOSC32KS in CLKCTRL.MCLKSTATUS).

Caution: If an external clock source fails while used as CLK_MAIN source, only the WDT can

provide a mechanism to switch back via System Reset.

ATtiny417/817

Datasheet Complete

DS40001901B-page 59

ATTINY817-MFR. Datasheet(PDF) 59 Page - Microchip Technology

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