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TMS320F28375DPZP Datasheet(PDF) 126 Page - Texas Instruments |
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TMS320F28375DPZP Datasheet(HTML) 126 Page - Texas Instruments |
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126 / 226 page ![]() TSCTR (counter−32 bit) RST CAP1 (APRD active) LD CAP2 (ACMP active) LD CAP3 (APRD shadow) LD CAP4 (ACMP shadow) LD Continuous / Oneshot Capture Control LD1 LD2 LD3 LD4 32 32 PRD [0−31] CMP [0−31] CTR [0−31] eCAPx Interrupt Trigger and Flag control to PIE CTR=CMP 32 32 32 32 32 ACMP shadow Event Prescale CTRPHS (phase register−32 bit) SYNCOut SYNCIn Event qualifier Polarity select Polarity select Polarity select Polarity select CTR=PRD CTR_OVF 4 PWM compare logic CTR [0−31] PRD [0−31] CMP [0−31] CTR=CMP CTR=PRD CTR_OVF OVF APWM mode Delta−mode 4 Capture events CEVT[1:4] APRD shadow 32 32 Figure 8-48. eCAP Block Diagram The eCAP module is clocked by PERx.SYSCLK. The clock enable bits (ECAP1–ECAP6) in the PCLKCR3 register turn off the eCAP module individually (for low- power operation). Upon reset, ECAP1ENCLK is set to low, indicating that the peripheral clock is off. TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 www.ti.com 126 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D |
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