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TMS320F28375DPZP Datasheet(PDF) 123 Page - Texas Instruments |
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TMS320F28375DPZP Datasheet(HTML) 123 Page - Texas Instruments |
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123 / 226 page  Note The VREFHI pin must be kept below VDDA + 0.3 V to ensure proper functional operation. If the VREFHI pin exceeds this level, a blocking circuit may activate, and the internal value of VREFHI may float to 0 V internally, giving improper ADC conversion or DAC output. Offset Error Code 2048 Figure 8-45. Buffered DAC Offset Code 3722 Code 373 Actual Gain Ideal Gain Linear Range (3.3-V Reference) Figure 8-46. Buffered DAC Gain www.ti.com TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 123 Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D |
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