TMS320F28375DPZP datasheet(119/226 Pages) TI

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Section 8.10.2.1.2 shows the CMPSS DAC static electrical characteristics. Figure 8-41 shows the CMPSS DAC

static offset. Figure 8-42 shows the CMPSS DAC static gain. Figure 8-43 shows the CMPSS DAC static linearity.

8.10.2.1.2 CMPSS DAC Static Electrical Characteristics

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

CMPSS DAC output range

Internal reference

VDDA (1)

External reference

VDAC

Static offset error(2)

–25

Static gain error(2)

–2

% of FSR

Static DNL

Endpoint corrected

>–1

LSB

Static INL

Endpoint corrected

–16

LSB

Settling time

Settling to 1 LSB after full-scale output

change

µs

Resolution

bits

CMPSS DAC output disturbance(3)

Error induced by comparator trip or

CMPSS DAC code change within the

same CMPSS module

–100

100

LSB

CMPSS DAC disturbance time(3)

200

VDAC reference voltage

When VDAC is reference

2.4

2.5 or 3.0

VDDA

VDAC load(4)

When VDAC is reference

kΩ

(1)

The maximum output voltage is VDDA when VDAC > VDDA.

(2)

Includes comparator input referred errors.

(3)

Disturbance error may be present on the CMPSS DAC output for a certain amount of time after a comparator trip.

(4)

Per active CMPSS module.

Offset Error

Figure 8-41. CMPSS DAC Static Offset

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TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28375DPZP Datasheet(PDF) 119 Page - Texas Instruments

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