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TMS320F28375DPZP Datasheet(PDF) 154 Page - Texas Instruments

Part # TMS320F28375DPZP
Description  TMS320F2837xD Dual-Core Microcontrollers
PDF  226 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F28375DPZP Datasheet(HTML) 154 Page - Texas Instruments

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8.12.3.1.1.2 McBSP Switching Characteristics
over recommended operating conditions (unless otherwise noted)
NO.(1)
(2)
PARAMETER
MIN
MAX
UNIT
M1
tc(CKRX)
Cycle time, CLKR/X
CLKR/X int
2P
ns
M2
tw(CKRXH)
Pulse duration, CLKR/X high
CLKR/X int
D – 5 (3)
D + 5 (3)
ns
M3
tw(CKRXL)
Pulse duration, CLKR/X low
CLKR/X int
C – 5 (3)
C + 5 (3)
ns
M4
td(CKRH-FRV)
Delay time, CLKR high to internal FSR valid
CLKR int
-7
7.5
ns
CLKR ext
3
27
M5
td(CKXH-FXV)
Delay time, CLKX high to internal FSX valid
CLKX int
-5
6
ns
CLKX ext
3
27
M6
tdis(CKXH-DXHZ)
Disable time, CLKX high to DX high impedance
following last data bit
CLKX int
–8
8
ns
CLKX ext
3
15
M7
td(CKXH-DXV)
Delay time, CLKX high to DX valid.
CLKX int
–3
9
ns
This applies to all bits except the first bit
transmitted.
CLKX ext
5
25
Delay time, CLKX high to DX
valid
DXENA = 0
CLKX int
–3
8
CLKX ext
5
20
Only applies to first bit
transmitted when in Data
Delay 1 or 2 (XDATDLY=01b
or 10b) modes
DXENA = 1
CLKX int
P – 3
P + 8
CLKX ext
P + 5
P + 20
M8
ten(CKXH-DX)
Enable time, CLKX high to
DX driven
DXENA = 0
CLKX int
-6
ns
CLKX ext
4
Only applies to first bit
transmitted when in Data
Delay 1 or 2 (XDATDLY=01b
or 10b) modes
DXENA = 1
CLKX int
P - 6
CLKX ext
P + 4
M9
td(FXH-DXV)
Delay time, FSX high to DX
valid
DXENA = 0
FSX int
8
ns
FSX ext
17
Only applies to first bit
transmitted when in Data
Delay 0 (XDATDLY=00b)
mode.
DXENA = 1
FSX int
P + 8
FSX ext
P + 17
M10
ten(FXH-DX)
Enable time, FSX high to DX
driven
DXENA = 0
FSX int
-3
ns
FSX ext
6
Only applies to first bit
transmitted when in Data
Delay 0 (XDATDLY=00b)
mode
DXENA = 1
FSX int
P - 3
FSX ext
P + 6
(1)
Polarity bits CLKRP = CLKXP = FSRP = FSXP = 0. If the polarity of any of the signals is inverted, then the timing references of that
signal are also inverted.
(2)
2P = 1/CLKG in ns.
(3)
C = CLKRX low pulse width = P
D = CLKRX high pulse width = P
TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D
TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D
SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021
www.ti.com
154
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D
TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D



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