DP8496 datasheet(36/92 Pages) NSC

36 / 92 page

40 Functional Description (Continued)

TABLE 418 ECC Correction Span

Polynomial

Maximum

Recommended

16-Bit CRC

None

32-Bit ECC

11 Bits

5 Bits

48-Bit ECC

15 Bits

11 Bits

56-Bit ECC

22 Bits

17 Bits

CRC may be used for either Header or Data fields or both

This is set in the Data or Header ECC count registers The

CRC-CCITT polynomial used by the DP84967 is given be-

low

P(x) e x16 a x12 a x5 a 1

The 32-bit code is a public domain computer generated

code This is listed below

P(x) e x32 a x28 a x26 a x19 a x17

x10 a x6 a x2 a 1

The 48 and 56-bit polynomials must be licensed by National

Semiconductor to users of the DP84967 for exclusive use

in products containing the DP84967 The codes generated

on disks by these polynomials may be distributed freely as

when used in floppy or removable hard disk media There is

no charge for this license

Operation during Correction

The DP84967 can be set to correct an error any time after

an error has been detected and before another command

has been issued A correction cycle will not take place un-

less a Start Correction Cycle command has been issued

By the time an error is reported by the DP84967 the data

read from the disk will have been transferred to buffer mem-

ory To correct an error a Start Correction command must

be issued by the processor During the execution of this

command the buffer memory will not be accessed by the

Disk Data Controller which leaves the buffer memory free

for other non-disk operations At the end of the correction

command the processor must use the information provided

by the DP84967 to manually correct the data residing in

buffer memory

The time it takes the Start Correction command to complete

is determined by the error’s location in the sector The near-

er to the start of the sector the longer the DP84967 takes

to locate the error This time can be determined using the

formula shown in

Figure 47 It should be noted that this is

the internal correction time only More time is required for

the processor to perform additional operations

TLF11212 – 14

Correction time

L b X

L e Length of data and ECC fields (bits)

X e Distance from start of sector to first bit in error (bits)

f e Read clock frequency (Hz)

FIGURE 47 Time for ECC Correction

The proper procedure to perform error correction is listed

below

1 Clear Disk Interrupt register

2 Set the Sector Byte Count registers to the sum of the

original sector length plus the length of the ECC polyno-

mial (4 6 or 7 bytes)

3 Issue the Start Correction Cycle command

4 After the command has finished (interrupt generated)

check the Disk Interrupt register If an error is indicated

the Correction Failed bit in the Disk Status register will

also be set The ECC error is not correctable by the

DP84967

5 If no error is reported the error is correctable The ad-

dress of the first byte in buffer memory that must be

corrected is given by the formula below

Address of Start of Sector a Contents of ECC Byte

Count Register b 1

If the contents of the ECC Byte Count register is greater

than or equal to the sector length the error is in the ECC

itself The data in buffer memory is already correct and

should not be modified

6 Use the Processor Pointer and Buffer Memory Data reg-

ister to read the invalid bytes from buffer memory Use

the data in the ECC Shift Registers specified in Table

413 EX-OR the first ECC Shift register byte with the first

buffer memory byte in error EX-OR the second ECC

Shift register byte with the second buffer memory byte in

error etc

7 Write the corrected data back to buffer memory with the

Processor Pointer and the Buffer Memory Data register

Header Diagnostic Operations

The Header Failed Although Sector Matched function is en-

abled independently for each header byte by the SM (Head-

er Failed Although Sector Matched) bit in the Header Con-

trol registers If a Compare HeaderIgnore Data operation is

performed and the total header did not compare but any

byte with the SM bit enabled did compare correctly an ‘‘Er-

ror’’ completion interrupt will be generated The ‘‘Header

Failed Although Sector Matched’’ status will be reported in

the Disk Status register The processor could then read the

header bytes from buffer memory

To find the last header bytes read from the disk in the buffer

memory the following steps may be taken

1 Set the AH (ActiveHolding) bit in the SCSI Operation

2 The first byte of the failing header information is located

in buffer memory at the address pointed to by

Contents of Disk Pointer Register b Number of Bytes

in Each Header

3 Set the AH bit in the SCSI Operation register back to

‘‘0’’

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