DP8496 datasheet(64/92 Pages) NSC

64 / 92 page

40 Functional Description (Continued)

45 TIMER

Since there are time-outs of various lengths used through-

out SCSI bus transactions and time periods that need to be

measured for other external and internal system timing a

general purpose Timer is put on-chip It can be programmed

to generate interrupts at a constant rate In addition to Se-

lectionReselection time-outs and monitoring for a ‘‘hung’’

bus this Timer can be reset by the index pulse and used to

check disk rotational speed seek time-outs head position

and many other events Execution of disk commands can

also be delayed until a time-out for positioning of certain

operations on disk data

The Timer interrupt is observable in the Disk Interrupt regis-

ter and is maskable in the Disk Interrupt Enable register

Two registers control the timer the Timer Prescale register

and the Timer Count register Timer Prescale not only con-

trols the divisor but three setreset functions Timer Count

is simply the number of periods in the interval and it reads

back the current count Timer Count is loaded last and

starts the timer

TABLE 430 Timer Periods

BCLK

Min Period

Max Period

10 MHz

400 ns

336 sec

14 MHz

286 ns

240 sec

18 MHz

222 ns

186 sec

22 MHz

182 ns

153 sec

451 Timer Register Descriptions

Timer Prescale (TPRE)

63h

76543210

LOI

ROZ

DCOZ

Prescale Code

This register is reset by the CRST pin and the reset com-

mands

LOI Load On Index

Restarts counting sequence when leading edge of in-

dex pulse is received This works independently of en-

abling the Index interrupt This bit reloads the timer

count and leaves the prescale value unchanged The

next interrupt generated will be 1BCLK

PRESCALE

TIMER COUNT seconds away No interrupt will be

generated until the Index pulse has been received and

the count value has elapsed

The index pulse has no effect on the Timer

ROZ Reload On Zero

When the Timer Count reaches zero it is automatically

reloaded with the initial value loaded by the processor

An interrupt is generated if enabled when the Timer

Count register reaches zero This mode can be used as

a ‘‘rate generator’’ giving an interrupt at a periodic rate

No reloading of the Timer Count register occurs An

interrupt occurs if enabled when the Timer Count reg-

ister reaches zero The Timer Interrupt will not occur

again until a new value is loaded into Timer Counter

DCOZ Drive Command On Zero

Drive commands loaded to Disk Command register will

not be started until the Timer Count register counts

down to zero The Timer Count register should be load-

ed after the Disk Command register with a value calcu-

lated to position the command at the track position de-

sired Typically the LOI (Load On Index) bit will be set

and command would be a Read or Write Unformatted

Drive commands are executed normally

Prescale Code

TABLE 431 Prescale Code

Prescale

Code

Code (Hex)

Value

3210

0000

0001

0010

0011

0100

0101

128

0110

256

0111

512

1000

1024

1001

2048

1010

4096

1011

8192

1100

16k

1101

32k

1110

64k

1111

128k

LOI and ROZ Bits

Load On Index and Restart On Zero bits can be used in any

combination When both the LOI and ROZ bits are set the

LOI function takes priority If the Index pulse is received a

reload is done regardless of the count The interesting case

is when the Timer Count register reaches zero before the

next index pulse Multiple interrupts can be generated dur-

ing the disk revolution with each revolution synchronized to

the index pulse A useful setup might be to program the

prescale and count to interrupt for each sector on a track

Timer Count (TCNT)

64h

76543210

Count

The action of loading the register starts the counting pro-

cess Timer Count is loaded by the processor and specifies

the number of 1BCLK

PRESCALE periods to count It

decrements to zero and creates an interrupt if enabled The

Timer Count is readable at any time and contains the cur-

rent count as it is decrementing

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