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VSC8658 Datasheet(PDF) 30 Page - Microsemi Corporation |
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VSC8658 Datasheet(HTML) 30 Page - Microsemi Corporation |
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30 / 95 page ![]() Functional Descriptions VMDS-10242 VSC8658 Datasheet Revision 4.1 22 • After receiving a packet on the media interface, register bit 18E.15 is set and cleared after being read. The packet then is counted by either the good CRC counter or the bad CRC counter. Both CRC counters are also automatically cleared when read. • The good CRC counter’s highest value is 10,000 packets. After it reaches this value, the counter clears and continues to count additional packets beyond that value. The bad CRC counter stops counting when it reaches its maximum counter limit of 255 packets. 4.16.3 Far-End Loopback The far-end loopback testing feature is enabled by setting register bit 23.3 to 1. When enabled, it forces incoming data from a link partner on the current media interface to be retransmitted back to the link partner on the media interface as shown in the following illustration. In addition, the incoming data also appears on the receive data pins of the MAC interface. Data present on the transmit data pins of the MAC interface is ignored when using this testing feature. Figure 13 • Far-End Loopback Diagram 4.16.4 Near-End Loopback When the near-end loopback testing feature is enabled (by setting the device register bit 0.14 to 1), data on the transmit data pins (TXD) is looped back onto the device receive data pins (RXD), as shown in the following figure. When using this testing feature, no data is transmitted over the network. Figure 14 • Near-End Loopback Diagram 4.16.5 Connector Loopback The connector loopback testing feature allows the twisted pair interface to be looped back externally. When using this feature, the PHY must be connected to a loopback connector or a loopback cable. Pair A should be connected to pair B, and pair C to pair D, as shown in the following figure. The connector loopback feature functions at all available interface speeds. Figure 15 • Connector Loopback Diagram Link Partner PHY_Port_n MAC RX TX RXD TXD Cat5 Link Partner PHY Port_n MAC RX TX RXD TXD Cat5 PHY Port_n MAC RXD TXD Cat5 A B C D |
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