ADF4377 datasheet(63/79 Pages) AD

63 / 79 page

Data Sheet

ADF4377

analog.com

Rev. 0 | 63 of 79

Figure 137.

Table 74. Bit Descriptions for REG0023

Bits

Bit Name

Description

Reset

Access

CAL_CT_SEL

VCO Calibration Count Select. Refer to Table 17.

0x0

R/W

[6:1]

R023_RSV6

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

R022_RSV0[8]

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

Address: 0x24, Reset: 0x00, Name: REG0024

Figure 138.

Table 75. Bit Descriptions for REG0024

Bits

Bit Name

Description

Reset

Access

R024_RSV4

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[6:3]

R024_RSV3

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

DCLK_MODE

Enable Frequency Reduction During VCO Calibration. Divides fDIV_RCLK and fDIV_NCLK by 2 when enabled.

Refer to Table 17.

0x0

R/W

0: disabled.

1: enabled.

R024_RSV2

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

R024_RSV1

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

Address: 0x25, Reset: 0x00, Name: REG0025

Figure 139.

Table 76. Bit Descriptions for REG0025

Bits

Bit Name

Description

Reset

Access

CLKODIV_DB

Enables Double Buffering for CLKOUT_DIV Bit Field.

0x0

R/W

ADF4377 Datasheet(PDF) 63 Page - Analog Devices

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