ADF4377 datasheet(26/79 Pages) AD

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Data Sheet

ADF4377

THEORY OF OPERATION

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Table 14. LD_COUNT Programming

LD_COUNT

PFD Cycles

786431

1112181

Figure 67. Lock Detector Timing, Bleed Current Disabled

Table 15. Lock Detector Timing, Bleed Current Disabled

Region

Absolute Phase

Difference at PFD

Lock Detector State

> tLDWIN

Low

< tLDWIN

Low, counts PFD cycles

High, ≥ desired PFD cycle count

< tLDWIN

High

> tLDWIN

Low (immediately)

When the charge pump bleed current is enabled, a phase offset is

applied to the PFD inputs. This phase offset (tIDEL) is proportional

to the amount of bleed current programmed in Equation 10 and

Equation 11. Region 3 and Region 4 in Figure 67 and Figure 68

highlight the PFD phase difference that the PLL settles to when the

charge pump bleed current is disabled or enabled, respectively.

Figure 68. Lock Detector Timing, Bleed Current Enabled

For proper operation of the lock detector, the absolute value of tIDEL

must be less than tLDWIN. The user sets the phase difference lock

window time (tLDWIN) for a valid lock condition with the LDWIN_PW

bit. In most cases, LDWIN_PW must be set to 0. Refer to Table

16 to understand the relationship between the LDWIN_PW bit and

maximum allowable tIDEL.

Table 16. Maximum tIDEL

LDWIN_PW

tIDEL(MAX)

±150 ps

±250 ps

VCO

The VCO core consists of 4 separate VCOs, each of which uses

256 overlapping bands, which allows the device to cover a wide

frequency range without large VCO sensitivity (KVCO). The output

frequency can be further extended by utilizing the output divider.

Figure 69. VCO and Clock Output Divider

The correct register values for the VCO_CORE, VCO_BAND, and

VCO_BIAS settings are determined by performing a VCO calibra-

tion. See the VCO Calibration section for more information. After

a VCO calibration is performed for a specific device and frequen-

cy, the VCO_CORE, VCO_BAND, and VCO_BIAS values can be

recorded. These recorded values may be programmed manually on

subsequent power ups when the same device and frequency are

used, thereby avoiding the VCO calibration time.

VCO Calibration

A VCO calibration is required to select the correct VCO core, band,

and bias settings for a specific VCO frequency. This procedure

assumes that the device is powered up, the desired reference

frequency is present on the REFP and REFN pins, and all other

registers are programmed correctly. Figure 70 and Figure 71 are

provided as visual aids for this procedure.

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