ADF4377 datasheet(67/79 Pages) AD

67 / 79 page

Data Sheet

ADF4377

analog.com

Rev. 0 | 67 of 79

Table 85. Bit Descriptions for REG002E

Bits

Bit Name

Description

Reset

Access

ADC_A_CONV

Enable ADC Conversion During a VCO Calibration.

0x0

R/W

0: ADC conversion only possible with write to ADC_ST_CNV bit field.

1: enabled. Normal operation. Automatically begins ADC conversion at the start of a VCO calibration or with

write to ADC_ST_CNV bit field.

Address: 0x2F, Reset: 0x00, Name: REG002F

Figure 149.

Table 86. Bit Descriptions for REG002F

Bits

Bit Name

Description

Reset

Access

R02F_RSV5

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

R02F_RSV4

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

R02F_RSV3

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

R02F_RSV2

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[3:2]

R02F_RSV1

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[1:0]

DCLK_DIV1

VCO Calibration Divider 1.

0x0

R/W

00: divide by 1.

01: divide by 2.

10: divide by 8.

11: divide by 32.

Address: 0x30, Reset: 0x00, Name: REG0030

Figure 150.

Table 87. Bit Descriptions for REG0030

Bits

Bit Name

Description

Reset

Access

[7:6]

R030_RSV4

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[5:4]

R030_RSV3

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[3:2]

R030_RSV2

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

[1:0]

R030_RSV1

Reserved. Table 42 provides required reserved register settings.

0x0

R/W

Address: 0x31, Reset: 0x00, Name: REG0031

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