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MEC1632 Datasheet(PDF) 30 Page - Microchip Technology |
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MEC1632 Datasheet(HTML) 30 Page - Microchip Technology |
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30 / 636 page ![]() MEC1632 DS00001592B-page 30 2012-2018 Microchip Technology Inc. at higher frequencies, but performance is not guaranteed (see Table 33-14, “SPI_CLK Frequencies,” on page 493 and Section 33.9.5.5, "Limits of SPI configurations," on page 487). 3.5.19 GANG PROGRAMMING INTERFACE TABLE 3-25: GANG PROGRAMMING INTERFACE 3.6 Pin Multiplexing Multifunction Pin Multiplexing in the MEC1632 is controlled by the GPIO Interface and illustrated in the Multiplexing Tables that follow. See Section 3.7, "Notes for Tables in this Chapter," on page 53 for notes that are referenced in the Pin Multiplexing tables. See Section 24.9.1, "Pin Control Register," on page 396 for pin multiplexing programming details. See also Section 24.7, "Pin Multiplexing Control," on page 391. Pin signal functions that exhibit power domain emulation have a different power supply designation in the “Emulated Power Well” column and “Signal Power Well“ columns of the multiplexing tables in Section 3.6.2. See also Section 3.4.1, "Pin Default State Through Power Transitions," on page 15 for a description of pin states through power transi- tions. Several signals that are alternate functions for GPIOs are not selected using the GPIO mux controls. These signals include the Gang Programmer interface. These signals are not listed in the following tables. 3.6.1 VCC POWER DOMAIN EMULATION Pin signal functions that exhibit VCC Power Domain Emulation are documented in the multiplexing tables as “Signal Power Well“= VTR and “Emulated Power Well” = VCC. The System Runtime Supply power VCC is not connected to the MEC1632. The VCC_PWRGD signal is used to indicate when power is applied to the System Runtime Supply. All pin signal functions that exhibit VCC power domain emulation are powered by VTR and controlled by the VCC_PWRGD signal input. Outputs on VCC power domain emulation pin signal functions are tri-stated when VCC_PWRGD is not asserted and are functional when VCC_PWRGD is active. Inputs on VCC power domain emulation pin signal functions are gated according as defined by the Gated State column in the following tables. 3.6.2 MULTIPLEXING TABLES In the following tables, the columns have the following meanings: 3.6.2.1 Pin Ref. Number Every pin has a reference number. The mapping between pin reference numbers and signal names is summarized in the first table in this chapter. Gang Programmer Interface (14 Pins) Pin Ref. Number Signal Name Description Notes 20 GANG_MODE Gang Programmer operating mode control 19 GANG_START Gang Programmer start control 25 GANG_STROBE Gang Programmer data latch strobe 26 GANG_FULL Gang Programmer data flow control 138 GANG_BUSY Gang Programmer operational status 29 GANG_ERROR Gang Programmer error status 108 GANG_DATA0 Gang Programmer Flash program data 0 106 GANG_DATA1 Gang Programmer Flash program data 1 104 GANG_DATA2 Gang Programmer Flash program data 2 143 GANG_DATA3 Gang Programmer Flash program data 3 141 GANG_DATA4 Gang Programmer Flash program data 4 139 GANG_DATA5 Gang Programmer Flash program data 5 137 GANG_DATA6 Gang Programmer Flash program data 6 93 GANG_DATA7 Gang Programmer Flash program data 7 |
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