MEC1632 datasheet(86/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 86

 2012-2018 Microchip Technology Inc.

6.8

Using Serial Interrupts

The MEC1632 will support the serial interrupt scheme, which is adopted by several companies, to transmit interrupt

information to the system. The serial interrupt scheme adheres to the Serial IRQ Specification for PCI Systems Version

6.0

TIMING DIAGRAMS for IRQSER CYCLE

PCICLK = 33 MHz_IN pin

IRQSER = SIRQ pin

Start Frame timing with source sampled a low pulse on IRQ1

Start Frame pulse can be 4-8 clocks wide.

Stop Frame Timing with Host using 17 IRQSER sampling period

Stop pulse is two clocks wide for Quiet mode, three clocks wide for Continuous mode.

There may be none, one, or more Idle states during the Stop Frame.

The next IRQSER cycle’s Start Frame pulse may or may not start immediately after the turn-around clock of the Stop

Frame.

FIGURE 6-5:

SERIAL INTERRUPTS WAVEFORM “START FRAME”

H=Host Control

SL=Slave Control

R=Recovery

T=Turn-around

S=Sample

FIGURE 6-6:

SERIAL INTERRUPT WAVEFORM “STOP FRAME”

H=Host Control

R=Recovery

T=Turn-around

S=Sample

I= Idle

IRQSER

PCICLK

Host Controller

IRQ1

Drive Source

None

IRQ0 FRAME IRQ1 FRAME

IRQ2 FRAME

None

START

START FRAME

IRQSER

PCICLK

Host Controller

IRQ15

Driver

None

IRQ14

IRQ15

IOCHCK#

None

STOP

STOP FRAME

START

NEXT CYCLE

FRAME

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