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MEC1632 Datasheet(PDF) 77 Page - Microchip Technology

Part # MEC1632
Description  Low Power 32-Bit Mobile Embedded Controller
PDF  636 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MEC1632 Datasheet(HTML) 77 Page - Microchip Technology

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 2012-2018 Microchip Technology Inc.
DS00001592B-page 77
MEC1632
Note 5-5
R/W / R means that some parts of a register are read/write and some parts are read-only.
Note 5-6
Resets are defined in Section 7.0, "Power, Clocks, and Resets": nSYS_RST on page 128 and
nSIO_RESET on page 97.
C6h - CBh
3C6h
R/W / R
0000_0062_0204h on
nSIO_RESET
Memory BAR for ACPI EC Interface 0
CCh - D1h
3CCh
R/W / R
0000_0062_0307h on
nSIO_RESET
Memory BAR for ACPI EC Interface 1
D2h - D7h
3D2h
R/W / R
0000_0062_0407h on
nSIO_RESET
Memory BAR for ACPI EC Interface 2
D8h - DDh
3D8h
R/W / R
0000_0062_0507h on
nSIO_RESET
Memory BAR for ACPI EC Interface 3
DEh - E3h
3DEh
R/W / R
0000_0000_0E04h on
nSIO_RESET
Memory BAR for Embedded Flash Interface
E4h - E9h
3E4h
R/W / R
0000_0000_100F on
nSIO_RESET
Memory BAR for EM Interface
EAh - EFh
3EAh -
3EFh
R
0000_0000 on
nSIO_RESET
Reserved
Configuration Registers for LDN
Eh (Embedded Flash Interface) at AHB base address FF_3800h
--
-
-
None
Configuration Registers for LDN
Fh (Flash SPI) at AHB base address FF_3C00h
--
-
-
None
Configuration Registers for LDN 10h (
EM Interface) at AHB base address FF_4000h
--
-
-
None
Configuration Registers for LDN 11h (
Real Time Clock) at AHB base address FF_4400h
--
-
-
None
Configuration Registers for LDN 20h (
BIOS Debug Port 0) at AHB base address FF_8000h
30h
330h
R/W
00h on nSYS_RST
Activate Register
Configuration Registers for LDN 21h (
BIOS Debug Port 1) at AHB base address FF_8400h
30h
330h
R/W
00h on nSYS_RST
Activate Register
Configuration Registers for LDN
3Fh (Global Configuration) at AHB base address FF_FC00h
00h - 02h
FF00h -
FF02h
-
Reserved
03H
FF03
-
-
MCHP Reserved
04h - 06h
FF04h -
FF06h
-00h on nSIO_RESET Reserved
07h
FF07h
R/W
-
Logical Device Number
08h - 1Fh
FF08h-
FF1Fh
-
Reserved
20h
FF20h
R
17h
Device ID
21h
FF21h
R
Current Revision
hardwired
Device Revision A read-only register which
provides device revision information
22h– 23h
FF22h-
FF23h
-04h on nSIO_RESET MCHP Reserved
24h
FF24h
R/W
00h
Device Mode
25h – 2Fh
FF25h-
FF2Fh
-
MCHP Reserved
TABLE 5-14:
MEC1632 CONFIGURATION REGISTER MAP (CONTINUED)
LPC CR
Index
AHB
Offset
Type
Note 5-5
Reset
Note 5-6
Configuration Register Name



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