MEC1632 datasheet(65/636 Pages) MICROCHIP

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DS00001592B-page 65

MEC1632

5.5

Configuration Registers

5.5.1

HOST ACCESS PORT

The Host can access Configuration Registers through a port described in Section 5.5.2, on page 65. Host accesses

are limited to 8 bits. There are 48 8-bit Global Configuration Registers (at offsets 00h through 2Fh), plus up to 208 8-bit

registers associated with each Logical Device. The Logical Device is selected with the Logical Device Number Register

(Global Configuration Register 07h). The INDEX PORT is used to select a specific logical device register. These regis-

ters are then accessed through the DATA PORT. The Logical Device registers are accessible only when the device is

in the Configuration State.

Only two states are defined (Run and Configuration). In the Run State, the chip will always be ready to enter the Con-

figuration State.

The desired configuration registers are accessed in two steps:

a) Write the index of the Logical Device Number Configuration Register (i.e., 07h) to the INDEX PORT and then

write the number of the desired logical device to the DATA PORT

b) Write the address of the desired configuration register within the logical device to the INDEX PORT and then write

or read the configuration register through the DATA PORT.

5.5.2

PRIMARY CONFIGURATION ADDRESS DECODER

The logical are configured through three Configuration Access Ports (CONFIG, INDEX and DATA). The BIOS uses

these ports to initialize the logical devices at POST (Table 5-4).

The Base Address of the Configuration Access Ports is determined by the BAR that corresponds to Logical Device Ch,

the LPC Interface. This is the first BAR in the table, at AHB address

FF_3360h. The Configuration Access Port

BAR is unique in that an LPC I/O access that matches this BAR does not directly generate an AHB read or

write. Instead, the Device and Frame values in the BAR indicates that the LPC I/O should be handled locally

in the LPC Logical Device. The Configuration map will issue an AHB read or write, the results of which will

be used to complete the LPC access.

5.5.2.1

Entering the Configuration State

The INDEX and DATA ports are effective only when the chip is in the Configuration State. The device enters the Con-

figuration State when the Config Entry Key is successfully written to the CONFIG PORT.

Config Entry Key = < 55h>

5.5.2.2

Exiting the Configuration State

The device exits the Configuration State when the following Config Exit Key is successfully written to the CONFIG PORT

address.

Config Exit Key = < AAh>

5.5.2.3

Read Accessing Configuration Port

The data read from the Configuration Port is undefined when not in the Configuration State. Writing the Config Entry

Key puts the chip in the Configuration State. Once in the Configuration State, reading the Configuration Port will return

the last value written to the Configuration Index. If no value was written the Configuration Port reads 00h.

Note:

• If accessing the Global Configuration Registers, step (a) is not required.

• Any write to an undefined or reserved Configuration register is terminated normally on the LPC bus without any

modification of state in the MEC1632. Any read to an undefined or reserved Configuration register returns FFh.

TABLE 5-4:

MEC1632 CONFIGURATION ACCESS PORTS

Port Name

Relative Address

Type

Port Name

CONFIG PORT

Configuration Access Ports Base Address + 0

Write

CONFIG PORT

INDEX PORT

Configuration Access Ports Base Address + 0

Read/Write

INDEX PORT

DATA PORT

Configuration Access Ports Base Address + 1

DATA PORT

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