MEC1632 datasheet(94/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 94

 2012-2018 Microchip Technology Inc.

6.10.6

BAR INIT REGISTER

BAR_INIT

This field is loaded into the LPC BAR located at LPC Logical Device Configuration Register offset at offset 60h on

nSIO_RESET.

6.10.7

MEM BAR INHIBIT REGISTER

MEM BAR_INHIBIT[63:0]

When bit i of the Mem BAR_Inhibit[63:0] field is asserted (‘1’), where i is the logical device number of one of the Host

Logical Devices in the MEC1632, the BAR for the associated device is disabled and its LPC Memory addresses will not

be claimed on the LPC bus, independent of the value of the Valid bit in the BAR. When bit i is not asserted (default),

BAR activity for the Logical Device is based on the Valid bit in the BAR.

All of the Mem BAR_Inhibit[63:0] bits are R/W and have no affect on reserved logical device numbers. The Host Log-

ical Devices in the MEC1632 are shown in Table 4-2 in Section 4.3.2, "AHB Address Space," on page 59.

TABLE 6-13:

BAR INIT REGISTER

HOST OFFSET

N/A

N/A HOST SIZE

EC ADDRESS

FF_3130h

16-bit EC SIZE

POWER

VTR

02Eh nSYS_RST DEFAULT

BUS

LPC SPB

BYTE0 BIT

D15

D14

D13

...

HOST TYPE

----

EC TYPE

R/W

BIT NAME

BAR_Init

TABLE 6-14:

MEM BAR INHIBIT REGISTER

HOST OFFSET

n/a

n/a HOST SIZE

EC ADDRESS

FF_3140h

64-bit EC SIZE

POWER

VTR

0000_0000_0000_0000h nSYS_RST DEFAULT

BUS

LPC SPB

BYTE3 BIT

D63

D62

D61

...

HOST TYPE

––

–

EC TYPE

R/W

BIT NAME

Mem BAR_Inhibit[63:0]

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