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MCT8317A Datasheet(PDF) 60 Page - Texas Instruments

Part # MCT8317A
Description  MCT8317A High Speed Sensorless Trapezoidal Control Integrated FET BLDC Driver
PDF  161 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MCT8317A Datasheet(HTML) 60 Page - Texas Instruments

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8.3.19.6.4 OCP Disabled (OCP_MODE = 111b)
No action is taken and no reporting (nFAULT or status register bits) is done when an OCP event happens in this
mode.
8.3.19.7 Cycle-by-Cycle (CBC) Current Limit (CBC_ILIMIT)
Cycle-by-cycle (CBC) current limit provides a means of controlling the amount of current delivered to the
motor. This is useful when the system must limit the amount of current pulled from the power supply during
motor operation. The CBC current limit limits the current applied to the motor from exceeding the configured
threshold. CBC current limit functionality is achieved by connecting the output of current sense amplifier VSOX to
a hardware comparator. If the voltage at output of current sense amplifier exceeds the CBC_ILIMIT threshold,
a CBC_ILIMIT event is recognized and action is taken according to CBC_ILIMIT_MODE. Total delay in reaction
to this event is dependent on the current sense amplifier gain and the comparator delay. CBC current limit in
closed loop is set through CBC_ILIMIT while configuration of OL_ILIMIT_CONFIG sets the CBC current limit in
open loop operation. Different modes can be configured through CBC_ILIMIT_MODE: CBC_ILIMIT automatic
recovery next PWM cycle, CBC_ILIMIT automatic recovery threshold based, CBC_ILIMIT automatic recovery
number of PWM cycles based, CBC_ILIMIT report only, CBC_ILIMIT disabled.
8.3.19.7.1 CBC_ILIMIT Automatic Recovery next PWM Cycle (CBC_ILIMIT_MODE = 000xb)
When a CBC_ILIMIT event happens in this mode, MCT8317A stops driving the FETs using recirculation mode
to prevent the inductive energy from entering the DC input supply. The CBC_ILIMIT bit is set to 1b in the fault
status registers. Normal operation resumes at the start of next PWM cycle and CBC_ILIMIT bit is reset to 0b.
The status of CONTROLLER_FAULT bit and nFAULT pin will be determined by CBC_ILIMIT_MODE. When
CBC_ILIMIT_MODE is 0000b, CONTROLLER_FAULT bit is set to 1b and nFAULT pin driven low until next PWM
cycle. When CBC_ILIMIT_MODE is 0001b, CONTROLLER_FAULT bit is not set to 1b and nFAULT is not driven
low.
8.3.19.7.2 CBC_ILIMIT Automatic Recovery Threshold Based (CBC_ILIMIT_MODE = 001xb)
When a CBC_ILIMIT event happens in this mode, MCT8317A stops driving the FETs using recirculation mode
to prevent the inductive energy from entering the DC input supply. The CBC_ILIMIT bit is set to 1b in the status
registers. Normal operation resumes after VSOX falls below CBC_ILIMIT threshold and CBC_ILIMIT bit is set to
0b. The status of CONTROLLER_FAULT bit and nFAULT pin will be determined by CBC_ILIMIT_MODE. When
CBC_ILIMIT_MODE is 0010b, CONTROLLER_FAULT bit is set to 1b and nFAULT pin driven low until VSOX falls
below CBC_ILIMIT threshold. When CBC_ILIMIT_MODE is 0011b, CONTROLLER_FAULT bit is not set to 1b
and nFAULT is not driven low.
8.3.19.7.3 CBC_ILIMIT Automatic Recovery after 'n' PWM Cycles (CBC_ILIMIT_MODE = 010xb)
When a CBC_ILIMIT event happens in this mode, MCT8317A stops driving the FETs using recirculation
mode to prevent the inductive energy from entering the DC input supply. The CBC_ILIMIT bit is set to 1b
in the fault status registers. Normal operation resumes after (CBC_RETRY_PWM_CYC +1) PWM cycles and
CBC_ILIMIT bit is set to 0b. The status of CONTROLLER_FAULT bit and nFAULT pin will be determined by
CBC_ILIMIT_MODE. When CBC_ILIMIT_MODE is 0100b, CONTROLLER_FAULT bit is set to1b and nFAULT
pin driven low until (CBC_RETRY_PWM_CYC +1) PWM cycles lapse. When CBC_ILIMIT_MODE is 0101b,
CONTROLLER_FAULT bit is not set to 1b and nFAULT is not driven low.
8.3.19.7.4 CBC_ILIMIT Report Only (CBC_ILIMIT_MODE = 0110b)
No protective action is taken when a CBC_ILIMIT event happens in this mode. The CBC current limit event is
reported by setting the CONTROLLER_FAULT and CBC_ILIMIT bits to 1b in the fault status registers. The gate
drivers continue to operate. The external controller manages the overcurrent condition by acting appropriately.
The reporting clears when the CBC_ILIMIT condition clears and a clear fault command is issued through the
CLR_FLT bit.
8.3.19.7.5 CBC_ILIMIT Disabled (CBC_ILIMIT_MODE = 0111b or 1xxxb)
No action is taken when a CBC_ILIMIT event happens in this mode.
MCT8317A
SLLSFQ2 – JANUARY 2023
www.ti.com
60
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Product Folder Links: MCT8317A



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