MCT8317A datasheet(65/161 Pages) TI1

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8.5.2 SOX Output

MCT8317A can provide the built-in current sense amplifiers' output on the SOX pin. SOX output is available on

pin 36 and can be configured by DAC_SOX_CONFIG.

8.5.3 Oscillator Source

MCT8317A has a built-in oscillator that is used as the clock source for all digital peripherals and timing

measurements. Default configuration for MCT8317A is to use the internal oscillator and it is sufficient to drive the

motor without need for any external crystal or clock sources.

In case MCT8317A does not meet accuracy requirements of timing measurement or speed loop, then

MCT8317A has an option to support an external clock reference.

In order to improve EMI performance, MCT8317A provides the option of modulating the clock frequency by

enabling Spread Spectrum Modulation (SSM) through SSM_CONFIG

8.5.3.1 External Clock Source

Speed loop accuracy of MCT8317A over wide operating temperature range can be improved by providing more

accurate optional clock reference on EXT_CLK pin as shown in Figure 8-46. EXT_CLK will be used to calibrate

internal clock oscillator and match the accuracy of the external clock. External clock source can be selected

by configuring CLK_SEL to 11b and setting EXT_CLK_EN to 1b. The external clock source frequency can be

configured through EXT_CLK_CONFIG.

Internal

Oscillator

(60 MHz)

Calibrate

EXT_CLK

Figure 8-46. External Clock Reference

Note

External clock is optional and can be used when higher clock accuracy is needed. MCT8317A will

always power up using the internal oscillator in all modes.

8.5.4 External Watchdog

MCT8317A provides an external watchdog feature - EXT_WD_EN bit should be set to 1b to enable the external

watchdog. When this feature is enabled, the device waits for a tickle (low to high transition in GPIO mode,

EXT_WD_STATUS_SET set to 1b in I2C mode) from the external watchdog input for a configured time interval;

if the time interval between two consecutive tickles is higher than the configured time, a watchdog fault is

triggered. This fault can be configured using EXT_WD_FAULT either as a report only fault or as a latched fault

with outputs in Hi-Z state. The latched fault can be cleared by writing 1b to CLR_FLT. In case, the next tickle

arrives before the configured time interval elapses, the watchdog timer is reset and it begins to wait for the next

tickle. This can be used to continuously monitor the health of an external MCU (which is the external watchdog

input) and put the MCT8317A outputs in Hi-Z in case the external MCU is in an erroneous state.

The external watchdog input is selected using EXT_WD_INPUT and can either be the EXT_WD pin or the I2C

interface . The time interval between two tickles to trigger a watchdog fault is configured by EXT_WD_FREQ;

there are 4 time (frequency) settings - 100 (10Hz), 200 (5Hz), 500 (2Hz) and 1000ms (1Hz).

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MCT8317A

SLLSFQ2 – JANUARY 2023

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