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MCT8317A Datasheet(PDF) 70 Page - Texas Instruments |
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MCT8317A Datasheet(HTML) 70 Page - Texas Instruments |
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70 / 161 page  Table 8-7. Example for 64-bit Write Operation Packet Start Byte Control Word 0 Control Word 1 Control Word 2 Data Bytes CRC Target ID I2C Write OP_R/W CRC_EN DLEN MEM_SEC MEM_PAGE MEM_ADDR MEM_ADDR DB0 - DB7 CRC Byte A6-A0 W0 CW23 CW22 CW21- CW20 CW19- CW16 CW15- CW12 CW11-CW8 CW7-CW0 [D7-D0] x 8 C7-C0 0x00 0x0 0x0 0x1 0x2 0x0 0x0 0x0 0x80 0x67452301EFCDAB89 0x45 0x00 0x60 0x00 0x80 0x67452301EFCDAB89 0x45 Example for 32-bit Read Operation: Address – 0x00000080, Data – 0x1234ABCD, CRC Byte – 0x56 (Sample value; does not match with the actual CRC calculation) Table 8-8. Example for 32-bit Read Operation Packet Start Byte Control Word 0 Control Word 1 Control Word 2 Start Byte Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Target ID I2C Write R/W CRC_ EN DLEN MEM_ SEC MEM_ PAGE MEM_ ADDR MEM_ ADDR Target ID I2C Read DB0 DB1 DB2 DB3 CRC Byte A6-A0 W0 CW23 CW22 CW21- CW20 CW19- CW16 CW15- CW12 CW11- CW8 CW7- CW0 A6-A0 W0 D7-D0 D7-D0 D7-D0 D7-D0 C7-C0 0x00 0x0 0x1 0x1 0x1 0x0 0x0 0x0 0x80 0x00 0x1 0xCD 0xAB 0x34 0x12 0x56 0x00 0xD0 0x00 0x80 0x01 0xCD 0xAB 0x34 0x12 0x56 8.6.2.5 Internal Buffers MCT8317A uses buffers internally to store the data received on I2C. Highest priority is given to collecting data on the I2C Bus. There are 2 buffers (ping-pong) for I2C Rx Data and 2 buffers (ping-pong) for I2C Tx Data. A write request from external MCU is stored in Rx Buffer 1 and then the parsing block is triggered to work on this data in Rx Buffer 1. While MCT8317A is processing a write packet from Rx Buffer 1, if there is another new read/write request, the entire data from the I2C bus is stored in Rx Buffer 2 and it will be processed after the current request. MCT8317A can accommodate a maximum of two consecutive read/write requests. If MCT8317A is busy due to high priority interrupts, the data sent will be stored in internal buffers (Rx Buffer 1 and Rx Buffer 2). At this point, if there is a third read/write request, the Target ID will be NACK’d as the buffers are already full. During read operations, the read request is processed and the read data from the register is stored in the Tx Buffer along with the CRC byte, if enabled. Now if the external MCU initiates an I2C Read (Target ID + R bit), the data from this Tx Buffer is sent over I2C. Since there are two Tx Buffers, register data from 2 MCT8317A reads can be buffered. Given this scenario, if there is a third read request, the control word will be stored in the Rx Buffer 1, but it will not be processed by MCT8317A as the Tx Buffers are full. Once a data is read from Tx Buffer, the data is no longer stored in the Tx buffer. The buffer is cleared and it becomes available for the next data to be stored. If the read transaction was interrupted in between and if the MCU had not read all the bytes, external MCU can initiate another I2C read (only I2C read, without any control word information) to read all the data bytes from first. 8.6.2.6 CRC Byte Calculation An 8-bit CCIT polynomial (x8 + x2+ x + 1) is used for CRC computation. CRC Calculation in Write Operation: When the external MCU writes to MCT8317A, if the CRC is enabled, the external MCU has to compute an 8-bit CRC byte and add the CRC byte at the end of the data. MCT8317A will compute CRC using the same polynomial internally and if there is a mismatch, the write request is discarded. Input data for CRC calculation by external MCU for write operation are listed below: 1. Target ID + write bit. 2. Control word – 3 bytes 3. Data bytes – 2/4/8 bytes MCT8317A SLLSFQ2 – JANUARY 2023 www.ti.com 70 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MCT8317A |
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