M95P16-IXMCSLASHEF datasheet(49/63 Pages) STMICROELECTRONICS

49 / 63 page

Symbol

Parameter (test conditions specified in Table 18 and

Table 19)

1.6 V ≤ VCC ≤ 3.6 V

Unit

Min

Max

tHHCH

HOLD not active time before clock high

tSHQZ(2)

Output disable time

tCLQV(2)

Clock low to output valid

Load 30 pF

10 (4)

tCLQX(2)

Output hold time

tHHQV(2)(3)

HOLD high to output valid

Load 30 pF

14(5)

tHHQX(2)

HOLD high to output low/high-Z

Load 30 pF

tHLQZ(2)

HOLD low to output high-Z

tWHSL(2)

Write protect setup time

tSHWL(2)

Write protect hold time

1. tCH + tCL must never be less than the shortest possible clock period, that is 1/fC(max).

2. Evaluated by characterization, not tested in production.

3. With default buffer strength (DRV1, DRV0 = 1, 1).

4. 14 ns with VCC ≤ 2.6 V.

5. tHHQV = tCLQV + 4 ns, independently from buffer strength.

Table 28. tCLQV characteristics versus buffer strength

Symbol

Parameter (test conditions specified

in Table 18 and Table 19)

Buffer

strenght

Maximum value

Unit

1.6 V ≤ VCC ≤ 2.6 V

2.6 V < VCC ≤ 3.6 V

tCLQV(1)

Clock low to

output valid

Load 30 pF

High

Do not use

Medium

Low

1. Evaluated by characterization, not tested in production.

Figure 37. Serial input timing

MSB IN

tDVCH

High impedance

LSB IN

tSLCH

tCHDX

tCLCH

tSHCH

tSHSL

tCHSH

tCHSL

tCH

tCL

tCHCL

tSHWL

tWHSL

MS69213

M95P16-I M95P16-E

DC and AC parameters

DS13710 - Rev 1

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