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M95P16-IXMC/EF Datasheet(PDF) 37 Page - STMicroelectronics

Part # M95P16-IXMC/EF
Description  Ultra low power 16 Mbit serial SPI page EEPROM with dual and quad outputs
PDF  63 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95P16-IXMC/EF Datasheet(HTML) 37 Page - STMicroelectronics

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6.18
Write identification page (82h)
The WRID instruction is used to write the identification page.
To write this page, a Write enable (06h) instruction must have been executed previously for the device to accept
the instruction (Status register bit WEL = 1). Once write is enabled, the WRID instruction is initiated by driving the
S pin low, then shifting the instruction code 82h followed by a 24-bit address (A23-A0) and at least one data byte,
into the D pin. The S pin must be held low for the whole length of the instruction, while data is being sent to the
device. The instruction is completed by driving S high (see Figure 28).
Figure 28. Write identification page
0
1
2
3
4
5
6
7
8
9
10
29
30
31
32
33
34
35
36
37
38
39
S
C
D
A23 A22 A21
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
40
41
42
43
44
45
46
47
4121
4122
4123
4124
4125
4126
4127
4128
C
D
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
S
24-bit address
WRID instruction
Data byte 1
Data byte 2
Data byte 512
MS69258V1
Each time a new data byte is shifted in, the least significant bits of the internal address counter are incremented.
If the address counter exceeds the page boundary (the page size is 512 bytes), the internal address pointer rolls
over to the beginning of the page where next data bytes are written. If more than 512 bytes are received, only the
last 512 bytes are written.
6.19
JEDEC identification (9Fh)
The JEDEC identification (JDID) instruction allows the three device identification bytes to be read in loop mode
(see Table 13).
This instruction is initiated by driving the S pin low, and then shifting the instruction code 9Fh into the D pin. The
code bits are latched on the rising edge of the C pin. After the last bit of instruction code is received, the three
identification bytes are shifted out (MSB first) on the Q pin, on the next falling clock edge. The same three bytes
are continuously shifted out as long as the clock continues to cycle. The instruction is stopped by driving the S pin
high, as shown in Figure 29.
Figure 29. JEDEC identification
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
C
D
Q
High impedance
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
S
JDID instruction
ST manufacturer code
SPI family code
Memory density code
MS55490V1
M95P16-I M95P16-E
Write identification page (82h)
DS13710 - Rev 1
page 37/63



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