M95P16-IXMCSLASHEF datasheet(13/63 Pages) STMICROELECTRONICS

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In addition, the Chip select (S) input offers a built-in safety feature: its input is edge-sensitive as well as

level

‑sensitive: after power-up, the device does not become selected until a falling edge has first been detected

on it. This ensures that Chip select (S) must have been high, prior to going low to start the first operation.

The VCC voltage must rise continuously, from 0 V up to the minimum VCC operating voltage defined in

Table 18. Operating conditions.

4.7

Power-down conditions

During power-down (continuous decrease of the supply voltage below the minimum VCC operating voltage

defined in Table 18. Operating conditions), the device must be:

•

deselected (S must follow the voltage applied on VCC)

•

in standby power mode (there must not be any internal write cycle in progress).

4.8

Active power, Standby power and Deep power-down modes

When Chip select (S) is low, the device is selected, and in Active power mode.

When Chip select (S) is high, the device is deselected, but remains in Active power mode until all internal cycles

have completed (Program, Erase, Write Status register). The device then goes into Standby power mode. The

device consumption drops to ICC1 as specified in Table 23. DC characteristics - Current consumption - M95P16-I.

Deep power-down mode is entered when the Deep power-down command is executed. The device consumption

drops further to ICC2. The device remains in this mode until the Release from power-down command is executed.

While in Deep power-down mode the device ignores all Write, Program and Erase commands. This provides

an extra software protection mechanism when the device is not in active use, by protecting it from inadvertent

operations. For further information, see Section 6.21 Deep power-down enter (B9h).

4.9

Device reset

To prevent erroneous instruction decoding and inadvertent programming, write or erase operations during

power

‑up, a power‑on‑reset (POR) circuit is included. At power-up, the device does not respond to any instruction

until VCC reaches the POR threshold voltage. This threshold is lower than the minimum VCC operating voltage

(see Table 18. Operating conditions).

At power-up, when VCC passes over the POR threshold, the device is reset and is in the following state:

•

In Standby power mode

•

Deselected

•

Status register

–

Write enable latch (WEL) bit reset to 0

–

Write In Progress (WIP) bit reset to 0

–

All non volatile bits unchanged

•

Configurable and Safety register

–

All volatile bits reset to 0

–

All non volatile bits unchanged

•

Volatile register

–

All bits reset to 0, except BUFLD, set to 1

The device must not be accessed until VCC reaches a valid and stable level, within the specified VCC(min) to

VCC(max) range, defined in Table 18. Operating conditions.

4.10

Hold condition

The Hold (HOLD) signal is used to pause serial communications with the device, without resetting the clocking

sequence. However, setting this signal low does not terminate Write Status register, Program, Write, or Erase

cycles that are in progress.

To enter the Hold condition, the device must be selected with Chip select (S) low.

During the Hold condition, the Serial data output (Q) is high-Z, and the Serial data input (D) and Serial clock (C)

are Don’t care.

M95P16-I M95P16-E

Power-down conditions

DS13710 - Rev 1

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