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M95P16-IXMC/EF Datasheet(PDF) 34 Page - STMicroelectronics |
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M95P16-IXMC/EF Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 63 page ![]() 6.15 Page write (02h) The Page write (PGWR) instruction allows from one to 512 bytes of data to be written in a single instruction (auto erase + program), leaving the other bytes of the page unchanged. A Write enable instruction must be executed before the device accepts this instruction (Status register bit WEL = 1). The Page write instruction is initiated by driving the S pin low, then shifting the instruction code 02h, followed by a 24-bit address (A23-A0), and at least one data byte, into the D-DQ0 pin. S must be held low for the whole length of the instruction, while data are sent to the device. The instruction is completed by driving S high. The whole sequence is shown in Figure 25. Figure 25. Page write 0 1 2 3 4 5 6 7 8 9 10 29 30 31 32 33 34 35 36 37 38 39 C D A23 A22 A21 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 S PGWR instruction 24-bit address Data byte 1 40 41 42 43 44 45 46 47 4121 4122 4123 4124 4125 4126 4127 4128 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Data byte 2 Data byte 512 MS55491V1 C D S S must be driven high after the eighth bit of the last byte has been latched, or the Page write instruction is not executed. After S is driven high, the self-timed Page write instruction starts for a time duration of tpw (see Table 26. Programming times). While the Page write cycle is in progress, the Read Status register instruction can still be accessed to check the status of the WIP bit, which is at 1 during the Page program cycle, and becomes a 0 when the cycle is finished and the device is ready to accept further instructions. After the Page write cycle has finished, the Write enable latch (WEL) bit in the Status register is cleared to 0. The page write operation is limited to writing bytes within a single physical page (where address A23 to A9 are the same). After each data byte received, the address on the nine lowest order address bits (A8 to A0) is internally incremented by one, and the remaining bits (A23 to A9) remain constant. If more than 512 bytes are transmitted, the address counter rolls over to the beginning of the same page and the previously stored data are overwritten. The write page instruction is not executed if a part of targeted area is protected by the block protection bits. In this case the status is reported with the PAMAF, ERF and PRF flags. M95P16-I M95P16-E Page write (02h) DS13710 - Rev 1 page 34/63 |
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