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M95P16-IXMC/EF Datasheet(PDF) 42 Page - STMicroelectronics |
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M95P16-IXMC/EF Datasheet(HTML) 42 Page - STMicroelectronics |
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42 / 63 page ![]() 7.2 Deep power-down Table 15. Deep power-down conditions Symbol Parameter Min Max Unit tDPDSL(1)(2) Delay for S low (new instruction after S high from Deep power-down enter instruction) 10 - µs tDPD(3) Time delay for Deep power-down mode after S high - 10 tRDPDSL(1)(2) Release Deep power-down delay to S low (new instruction) 30 - 1. Refer to Figure 31. Deep power-down enter and to Figure 32. Deep power-down release. 2. Evaluated by characterization, not tested in production. 3. Specified by design, not tested in production. 7.3 Reset Table 16. Reset recovery time Symbol Parameter Min Max Unit tRST1(1) Reset time when reset occurs with WIP = 0 - 30 µs tRST2(1) Reset time when reset occurs during modify operations (except Chip erase) - 12 ms tRST3(1) Reset time when reset occurs in Chip erase execution - 25 1. Specified by design, not tested in production. M95P16-I M95P16-E Deep power-down DS13710 - Rev 1 page 42/63 |
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