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M95P16-IXMC/EF Datasheet(PDF) 6 Page - STMicroelectronics |
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M95P16-IXMC/EF Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 63 page ![]() 2.2 Memory map The memory array is divided into 4096 erasable pages of 512 bytes, and is organized either as 512 erasable sectors of 4 Kbytes, 32 erasable blocks of 64 Kbytes, or as an entirely erasable array. The device offers two additional (identification) 512-byte pages. The first contains identification data and, upon request, the UID. The second page can be used to store sensitive application parameters that can (later) be permanently locked in Read-only mode. The device features a memory protection scheme with block granularity coded in four non-volatile bits of the status register. The memory array configuration is organized as: • 2097152 bytes • 32 blocks of 64 Kbytes, or 512 sectors of 4 Kbytes, or 4096 pages of 512 bytes, hence: – each block contains 16 sectors – each sector contains 8 pages – each page contains 512 bytes See the address range in Table 2. M95P16-I M95P16-E Memory map DS13710 - Rev 1 page 6/63 |
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