LXT386LE datasheet(48/78 Pages) INTEL

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LXT386 — QUAD T1/E1/J1 Transceiver

Datasheet

5.4.1

Boundary Scan Register (BSR)

The BSR is a shift register that provides access to all the digital I/O pins. The BSR is used to apply

and read test patterns to/from the board. Each pin is associated with a scan cell in the BSR register.

Bidirectional pins or tristatable pins require more than one position in the register. Table 1 shows

the BSR scan cells and their functions. Data into the BSR is shifted in LSB first.

Example 1. Boundary Scan Register (BSR)

Bit #

Signal

I/O

Type

Bit

Symbol

Comments

0LOS3

LOS3

RNEG3

N/A

HIZ3

HIZ3 controls the RPOS3, RNEG3 and RCLK3 pins. Setting HIZ3 to “0”

enables output on the pins. Setting HIZ3 to “1” tristates the pins.

RPOS3

RCLK3

TNEG3

TPOS3

TCLK3

LOS2

RNEG2

N/A

HIZ2

HIZ2 controls the RPOS2, RNEG2 and RCLK2 pins. Setting HIZ2 to “0”

enables output on the pins. Setting HIZ2 to “1” tristates the pins.

RPOS2

RCLK2

TNEG2

TPOS2

TCLK2

MCLK

MODE

INT

INTRUPTB

N/A

SDORDYENB

SDORDYENB controls the ACK pin. Setting SDORDYENB to “0” enables

output on ACK pin. Setting SDORDYENB to “1” tristates the pin.

ACK

SDORDY

ALE

CLKE

LOOP0

I/O

PADD0

LXT386LE Datasheet(PDF) 48 Page - Intel Corporation

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