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LXT386LE Datasheet(PDF) 55 Page - Intel Corporation |
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LXT386LE Datasheet(HTML) 55 Page - Intel Corporation |
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55 / 78 page ![]() QUAD T1/E1/J1 Transceiver — LXT386 Datasheet 55 Input leakage current Iil -10 +10 µA Tri state leakage current Ihz -10 +10 µA Tri state output current Ihz –– 1 µA TTIP, TRING Line short circuit current –– – 50 mA RMS 2 x 11 Ω series resistors and 1:2 transformer Input Leakage (TMS, TDI, TRST) –– – 50 µA Table 37. E1 Transmit Transmission Characteristics Parameter Sym Min Typ Max Unit Test Condition Output pulse amplitude 75 Ω 120 Ω – 2.14 2.7 2.37 3.0 2.60 3.3 V V Tested at the line side Peak voltage of a space 75 Ω 120 Ω – -0.237 -0.3 0.237 0.3 V V Transmit amplitude variation with supply – -1 +1 % Difference between pulse sequences – 200 mV For 17 consecutive pulses Pulse width ratio of the positive and negative pulses – 0.95 1.05 At the nominal half amplitude Transmit transformer turns ratio for 75/120 Ω characteristic impedance – 1:2 Rt = 11 Ω ± 1% Transmit return loss 75 Ω coaxial cable1 51kHz to 102 kHz 102 kHz to 2.048 MHz 2.048 MHz to 3.072 MHz – 15 15 15 17 17 17 – dB dB dB Using components in the LXD384 evaluation board. Transmit return loss 120 Ω twisted pair cable1 51kHz to 102 kHz 102 kHz to 2.048 MHz 2.048 MHz to 3.072 MHz – 15 15 15 20 20 20 – dB dB dB Using components in the LXD384 evaluation board. Transmit intrinsic jitter; 20Hz to 100kHz –– 0.030 0.050 U.I. Tx path TCLK is jitter free Transmit path delay Bipolar mode 2 U.I. JA Disabled Unipolar mode 7 U.I. 1. Guaranteed by design and other correlation methods. Table 38. E1 Receive Transmission Characteristics Parameter Sym Min Typ Max Unit Test Condition Permissible cable attenuation ––– 12 dB @1024 kHz Receiver dynamic range DR 0.5 –– Vp Signal to noise interference margin S/I -15 –– dB Per G.703, O.151 @ 6 dB cable Attenuation 1. Guaranteed by design and other correlation methods. Table 36. DC Characteristics (Continued) Parameter Sym Min Typ Max Unit Test Condition 1. Output drivers will output CMOS logic levels into CMOS loads. |
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