56F8322 datasheet(30/136 Pages) FREESCALE

30 / 136 page

56F8322 Techncial Data, Rev. 16

Freescale Semiconductor

Preliminary

3.3 Use of On-Chip Relaxation Oscillator

An internal relaxtion oscillator can supply the reference frequency when an external frequency source of

crystal is not used. During a boot or reset sequence, the relaxation oscillator is enabled by default, and the

PRECS bit in the PLLCR word is set to 0. If an external oscillator is connected, the relaxation oscillator

can be deselected instead by setting the PRECS bit in the PLLCR to 1. If a changeover between internal

and external oscillators is required at start up, internal device circuits compensate for any asynchronous

transitions between the two clock signals so that no glitches occur in the resulting master clock to the chip.

When changing clocks, the user must ensure that the clock source is not switched until the desired clock

is enabled and stable.

To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator

can be incrementally adjusted to within + 0.1% of 8MHz by trimming an internal capacitor. Bits 0-9 of the

OSCTL (oscillator control) register allow the user to set in an additional offset (trim) to this preset value

to increase or decrease capacitance. Upon power-up, the default value of this trim is 512 units. Each unit

added or deleted changes the output frequency by about 0.1%, allowing incremental adjustment until the

desired frequency accuracy is achieved.

The internal oscillator is calibrated at the factory to 8MHz and the TRIM value is stored in the Flash

information block and loaded to the FMOPT1 register at reset. When using the relaxation oscillator, the

boot code should read the FMOPT1 register and set this value as OSCTL TRIM. For further information,

see the 56F8300 Peripheral User Manual.

3.4 Internal Clock Operation

At reset, both oscillators will be powered up; however, the relaxation oscillator will be the default clock

reference for the PLL. Software should power down the block not being used and program the PLL for the

correct frequency.

56F8322 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc