56F8322 datasheet(49/136 Pages) FREESCALE

49 / 136 page

Peripheral Memory Mapped Registers

56F8322 Technical Data, Rev. 16

Freescale Semiconductor

Preliminary

Table 4-26 Flash Module Registers Address Map

(FM_BASE = $00 F400)

Address Offset

FMCLKD

Clock Divider Register

FMMCR

Module Control Register

Reserved

FMSECH

Security High Half Register

FMSECL

Security Low Half Register

Reserved

FMPROT

$10

Protection Register (Banked)

FMPROTB

$11

Protection Boot Register (Banked)

Reserved

FMUSTAT

$13

User Status Register (Banked)

FMCMD

$14

Command Register (Banked)

Reserved

FMOPT 0

$1A

16-Bit Information Option Register 0

Hot temperature ADC reading of Temperature Sensor; value

set during factory test

FMOPT 1

$1B

16-Bit Information Option Register 1

Trim cap setting of the relaxation oscillator

FMOPT 2

$1C

16-Bit Information Option Register 2

Room temperature ADC reading of Temperature Sensor; value

set during factory test

Table 4-27 FlexCAN Registers Address Map

(FC_BASE = $00 F800)

FlexCAN is NOT available in the 56F8122 device

Address Offset

FCMCR

Module Configuration Register

Reserved

FCCTL0

Control Register 0 Register

FCCTL1

Control Register 1 Register

FCTMR

Free-Running Timer Register

FCMAXMB

Maximum Message Buffer Configuration Register

Reserved

FCRXGMASK_H

Receive Global Mask High Register

FCRXGMASK_L

Receive Global Mask Low Register

56F8322 Datasheet(PDF) 49 Page - Freescale Semiconductor, Inc

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