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MPC8280 Datasheet(PDF) 901 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 901 Page - Freescale Semiconductor, Inc |
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901 / 1386 page  Multi-Channel Controllers (MCCs) MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 29-11 29.3.2 Channel-Specific Transparent Parameters Table 29-6 describes channel-specific parameters for transparent operation. Table 29-6. Channel-Specific Parameters for Transparent Operation Offset1 Name Width Description 0x00 TSTATE Word Tx internal state. To start a transmitter channel the user must write to TSTATE 0xHH80_0000. HH is the TSTATE high byte described in Section 29.3.1.1, “Internal Transmitter State (TSTATE)—HDLC Mode.” 0x04 ZISTATE Word Zero-insertion machine state.(User-initialized to 0x10000207 for regular channel, and 0x30000207 for inverted channel) 0x08 ZIDATA0 Word Zero-insertion high word data buffer (User-initialized to 0xFFFFFFFF) 0x0C ZIDATA1 Word Zero-insertion low word data buffer (User-initialized to 0xFFFFFFFF) 0x10 TBDFlags Hword TxDB flags, used by the CP (read-only for the user) 0x12 TBDCNT Hword Tx internal byte count. Number of remaining bytes in buffer, used by the CP (read-only for the user) 0x14 TBDPTR Word Tx internal data pointer. Points to current absolute data address of channel, used by the CP (read-only for the user) 0x18 INTMSK Hword Channel’s interrupt mask flag. See Section 29.3.3.1.1, “Interrupt Circular Table Entry and Interrupt Mask (INTMSK) —AAL1 CES.” 0x1A CHAMR Hword Channel mode register. See Section 29.3.2.3, “Channel Mode Register (CHAMR)—Transparent Mode.” 0x1C — Word Reserved 0x20 RSTATE Word Rx internal state. To start a receiver channel the user must write to RSTATE 0xHH80_0000. HH is the RSTATE high byte described in Section 29.3.1.4, “Internal Receiver State (RSTATE)—HDLC Mode.” 0x24 ZDSTATE Word Zero-deletion machine state. Initialize ZDSTATE as in the following table: 0x28 ZDDATA0 Word Zero-deletion high word data buffer (User-initialized to 0xFFFFFFFF) 0x2C ZDDATA1 Word Zero-deletion low word data buffer (User-initialized to 0xFFFFFFFF) Channel Type RCVSYNC ZDSTATE Initial Programmed Value If pattern synchronization is used (CHAMR[SYNC] = 1x), then… Regular 0bxxxx_xxxx_xxxx_xxx0 0x00FF_FFE0 0bxxxx_xxxx_xxxx_xxx1 0x0000_0000 Inverted 0bxxxx_xxxx_xxxx_xxx0 0x20FF_FFE0 0bxxxx_xxxx_xxxx_xxx1 0x2000_0000 If pattern synchronization is not used (CHAMR[SYNC] = 00), then… Regular 0x0000 0x50FF_FFE0 Inverted 0x0000 0x70FF_FFE0 |
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