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KING BILLION ELECTRONICS CO., LTD

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HE84G762B

HE80004 Series

June 1, 2004

V0.92

This specification is subject to change without notice. Please contact sales person for the latest version before use.

7. External RAM/Flash Memory

The external memory devices can be mask ROM, static RAM, or NOR type FLASH memory. Most NOR

type FLASH memory and RAM can be used as external storage for both program and data, so program

can be downloaded to external memory devices for future execution. However, there are some limitations.

When the data is to be written to external devices, the loader must reside in internal program space. In

other words, the loader program must be in internal ROM. When download is completed, the program in

the external memory can be run.

The data written to external memory devices is through a command interface composed of AC, EXMC

and EXMD registers for setting up the memory addresses, switching memory buses, generating read/write

pulse, read/write memory contents, etc. When writing finishes, external memory can be switched back the

external address and data bus for CPU to fetch data and instructions.

Writing to address registers is through a common register AC. Writing to AC will write data to ACL, ACH,

and then ACP in cyclic order. The sequence will be reset by an access to EXMD register. Therefore, it is

advisable to make a dummy read to EXMD register before writing to AC, so that the first write will be

made to ACL.

ACL: Lowest Significant Byte of Address Counter.

ACH: 2nd Byte of Address Counter.

ACP: Most Significant Byte of Address Counter.

DNLD: Switch the bus to download bus.

RD: Read pulse control.

WR: Write pulse control.

After address setup, the data can be written to address device through EXMD register. Program must

generate the required write pulse by firmware. The address counter AC will automatically increment with

each read/write access.

The procedure for downloading data from I/O or any other sources, i.e. command mode ROM device is as

follows:

Switch the external memory to download bus by setting the DNLD bit of EXMC register.

Mode

Description

Reset Value

ACL

R/W Address Counter Low for AC7 ~ AC0

“--------“

ACH

R/W Address Counter High for AC15 ~ AC8

“--------“

ACP

R/W Address Counter Page for AC23 ~ AC16

“--------“

Mode Description

Reset Value

EXMC

DNLD

“-----011”

Type

Description

Reset Value

EXMD

R/W

“--------“

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