ACT2861 datasheet(24/97 Pages) QORVO

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Data Sheet Rev. F, April 2022 | Subject to change without notice

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ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

Charge Termination Suspend (CTSUSPEND)

This state prevents charging when the battery tempera-

ture measured by the TH pin exceeds the JEITA or Bat-

tery Temp registers settings for Hot or Cold. The state

machine only enters CTSUSPEND from the CHGTERM

state. The charger transitions back to the CHGTERM

state and resumes charging when the temperature re-

turns to allowable levels. The system can force the IC

out of the CTSUSPEND state by disabling the TH input

via I2C.

In this state, the Fast Charge Safety Timer is still held

at 0.

During this state the nCHG output blinks at 1HZ to indi-

cate a fault condition.

Fault Mode (FAULT)

This state protects the battery against all system level

faults by disabling the charger and preventing any addi-

tional current to go to the battery.

The charger enters the FAULT state if any of the follow-

ing occurs:

1. Fast Charge Safety Timer Timeout – If the timer

exceeds the setting in the FC_SAFETY_TIMER[4:0]

It stays in the FAULT state until this timer is reset with

the I2C bit DIS_SAFETY_TIMER in register 0x1Bh. Any

condition that clears the Fast Charge Safety timer

makes the charger exit the FAULT state and returns the

charger to the RESET state to start charging again. The

Fast Charge Safety timer can be reset by setting the I2C

bit DIS_SAFETY_TIMER = 1. The charger also exits the

FAULT state if the IC is enters HIZ or SHIPMODE. Re-

fer to the Operating Modes State Machine Diagram for

more details.

2. Low Battery Safety Timer Timeout – If the timer ex-

ceeds 120 minutes for the states when VBAT is less

than VBAT LOW, then the charger enters the FAULT

state. It stays in the FAULT state until this timer is reset

with the I2C bit DIS_SAFETY_TIMER in register 0x1Bh.

Any condition that clears the Low Battery Safety Timer

makes the charger exit the FAULT state and returns the

charger to the RESET state to start charging again. The

Low Battery Safety Timer can be reset by setting the I2C

bit DIS_SAFETY_TIMER = 1. The charger also exits the

FAULT state if the IC is enters HIZ or SHIPMODE. Re-

fer to the Operating Modes State Machine Diagram for

more details.

3. VBAT OV Fault – This fault can be latching or non-

latching depending on the I2C bit DIS_VBAT_OVP

in register 0x01h setting. If DIS_VBAT_OVP=0, then

a battery overvoltage fault is latching. This requires the

IC to exit the Charge state to exit the charger FAULT

state. Exit the Charge state with the EN_CHG pin or any

other method shown in the Operating Modes State Ma-

chine Diagram

If DIS_VBAT_OVP=1, then a battery overvoltage fault

is not latching. The charger exits the FAULT state and

returns to the RESET state when the overvoltage

fault clears.

A 40msec deglitch timer is available to prevent false OV

fault detection due to noise or short battery voltage tran-

sients The I2C bit VBAT_OV_DEGLITCH_EN in register

0x0Bh sets the deglitch time. Setting this bit = 1 gives a

40ms deglitch time. Setting it = 0 gives a 5us deglitch

time.

4. VIN OV or VIN UV Fault – If the VIN voltage exceeds

the UVLO or OVLO thresholds, the charger stops charg-

ing and enters the FAULT state. Once the input voltage

returns to an acceptable level, the IC returns to the RE-

SET state to restart the charging process.

5. VREG LDO Fault – If the VREG LDO is not within

regulation or in an overcurrent condition, the charger

enters the FAULT state. Once the fault condition has

been removed from the LDO, the charger returns to the

RESET state to restart the charging process. This fault

can be ignored, if I2C bit DIS_CHG_VREG_FLT in reg-

ister 0x0Dh = 1. If this bit = 1, the charger does NOT go

to the FAULT state with a VREG LDO fault.

6. Die Thermal Shutdown (TSD) – If the die tempera-

ture exceeds TSHUT (160°C) the charger moves into

the FAULT state until it cools down by the thermal hys-

teresis, TSHUT_HYST (30°C). This fault cannot be

cleared or masked. The IC must cool down before exit-

ing the FAULT state. Once the IC cools down, it auto-

matically clears this fault, exits the FAULT state, and re-

turns to the RESET state to resume charging.

7. Watchdog Fault – If the watchdog timer is enabled

and the timer ties out, the Watchdog fault holds the

charger in the FAULT state until the watchdog timer is

reset or cleared. It can be reset by writing a 1 to the I2C

bit WATCHDOG_RESET or by disabling the Watchdog

timer with I2C bit WATCHDOG[1:0]=00.

8. FET_OC – If any of the FET currents reach the over-

current limit threshold for 16 cycles in a row, the IC en-

ters FET_OC fault. The fault latches and the IC must

EXIT the Charge state to clear the latch. Exit the Charge

state with the EN_CHG pin or any other method shown

in the Operating Modes State Machine Diagram

When the IC is in the FAULT state, the switching

charger is disabled and the charge current to the battery

is 0A.

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