Data Sheet Rev. F, April 2022 | Subject to change without notice

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ACT2861

30V Buck-Boost Charger with Integrated MOSFETs and OTG

®

Table 5: JEITA Mode Charging Safety Timer Configuration

Mode

Temp

JEITA_ISETC

[1:0]

JEITA_ISETH

JEITA_VSETH

Fast Charge

Current

Fast Charge

Safety Timer

PreCharge /

Short Current

Low

Battery

Safety

Timer

T0

<0C

XX

X

XXX

Suspended

Stopped

Suspended

Stopped

T1 to T2

0C to

10C

00

X

XXX

Suspended

Stopped

Suspended

Stopped

01

X

XXX

25% of ICHG

½ Speed

ISHRT / IPRECHG

Full Speed

10

X

XXX

50% of ICHG

½ Speed

ISHRT / IPRECHG

Full Speed

11

X

XXX

100% of ICHG

Full Speed

ISHRT / IPRECHG

Full Speed

T3 to T5

45C to

60C

XX

X

NOT 000

Reduced Voltage

½ Speed

ISHRT / IPRECHG

Full Speed

XX

1

000

Normal

Full Speed

ISHRT / IPRECHG

Full Speed

XX

0

000

50% of ICHG

½ Speed

ISHRT / IPRECHG

Full Speed

T6

> 60C

XX

X

XXX

Suspended

Stopped

Suspend

Stopped

Battery Voltage

Charge Current

10°C

0°C

45°C

60°C

Set by REG

JEITA_VSETH

Set by REG

JEITA_ISETH

Set by REG

JEITA_ISETC

Figure 13: JEITA Charging Profile

Non-JEITA Battery Temperature Control

The ACT2861 also includes non-JEITA battery temper-

ature control. Enable this mode by setting I2C bit

DIS_JEITA in register 0x1Ch = 1. In this mode, the IC

compares the battery voltage as measured on the TH

pin to two internal I2C registers: OTG_HOT[1:0] and

OTG_COLD, both in register 0x1D. If the temperature is

higher than OTG_HOT[1:0], all charging is suspended

and the safety timers are stopped. If the temperature is

lower than OTG_COLD, all charging is suspended and

the safety timers are stopped.

OTG_HOT[1:0] selects 55degC, 60degC, or 65degC.

Set this register = 11 to disable shutdown at hot temper-

atures. The OTG_COLD register selects between

0degC and -10degC. It is not possible to automatically

disable charging at low temperatures. However, a host

processor can read the battery temperature via the ADC

converter and manually disable charging.

Battery Path Impedance Compensation

The ACT2861 includes a Battery Path Impedance Com-

pensation feature that speeds the charging cycle. This

feature compensates for system level voltage drops due

to PCB, connector, wiring resistances, and battery pack

current sense resistances.

These voltage drops effectively reduce the voltage at

the battery. This results in the charger reaching the con-

stant voltage portion of the charge cycle too soon. Stay-

ing in constant current mode longer reduces the charg-

ing time.

The ACT286x allows the user to compensate for the

system level resistances by increasing the voltage reg-

ulation set point according to a formula that is propor-

tional to charging current and system resistance. This

feature

is

implemented

with

two

I2C

registers:

BAT_COMP_VCLAMP[2:0]

and

BAT_PATH_COMP[2:0]

in

register

0x0Ch.

The

BAT_COMP_VCLAMP[2:0] register sets the maximum

increase in charging voltage. This can be programmed

between 0mV and 420mV. The BAT_PATH_COMP[2:0]

register sets the

system resistance between 0mΩ and

140mΩ.

For safe operation, if one register is set to a non-zero

value, the other register should also bet set to a non-

zero value. The maximum battery termination voltage is

set by the lower of the following two equations.

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Where VBAT_TERM is the new, compensated termination

voltage in volts, VVTERM_I2C is the I2C battery termination

voltage programmed in registers 0x12h and 0x11h, ICHG

is the actual charging current. RBAT_PATH_COMP is the pro-

grammed

system

impedance

in

ohms,

and

VBAT_COMP_VCLAMP is the maximum allowable increase in

battery termination voltage.